Comparing the reliability and intermetallic layer of solder joints prepared with infrared and vapour phase soldering
O Krammer - Soldering & Surface Mount Technology, 2014 - emerald.com
Purpose–The purpose of this paper is to compare the reliability and intermetallic layer (IML)
of solder joints prepared with infrared (IR) and vapour phase (VP) soldering. The reliability of …
of solder joints prepared with infrared (IR) and vapour phase (VP) soldering. The reliability of …
Cross-scale numerical analysis of PCB lamination process by an innovative partitioned homogenization method for the non-uniform curing shrinkage effect
G Wan, Q Dong, X Sun, H Zheng, M Cheng… - Microelectronics …, 2024 - Elsevier
This study introduces a cross-scale numerical analysis approach for modeling the
lamination process and predicting the post-lamination warping deformation of Printed Circuit …
lamination process and predicting the post-lamination warping deformation of Printed Circuit …
Warpage simulation of a multilayer printed circuit board and microelectronic package using the anisotropic viscoelastic shell modeling technique that considers the …
DH Kim, SJ Joo, DO Kwak… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
In this paper, the warpage simulation of a high-density multilayer printed circuit board (PCB)
for solid-state disk drive (SSD) and microelectronic package was performed using the …
for solid-state disk drive (SSD) and microelectronic package was performed using the …
Solder reflow process induced residual warpage measurement and its influence on reliability of flip-chip electronic packages
SY Yang, YD Jeon, SB Lee, KW Paik - Microelectronics Reliability, 2006 - Elsevier
To meet the future needs of high pin count and high performance, package size of flip-chip
devices is constrained to become larger. In addition, to fulfill the environment issues, lead …
devices is constrained to become larger. In addition, to fulfill the environment issues, lead …
Simulation and optimization of silicon thermal CVD through CFD integrating Taguchi method
WT Cheng, HC Li, CN Huang - Chemical Engineering Journal, 2008 - Elsevier
A steady laminar flow coupled with heat transfer, gas-phase chemistry, and surface
chemistry model, was numerically solved for optimization of thermal chemical vapor …
chemistry model, was numerically solved for optimization of thermal chemical vapor …
New dummy design and stiffener on warpage reduction in Ball Grid Array Printed Circuit Board
Printed Circuit Board (PCB) warpage increases as thickness decreases and ultimately is
attributed to CTE mismatch and thickness geometry of the components. Recently, a thin Ball …
attributed to CTE mismatch and thickness geometry of the components. Recently, a thin Ball …
Investigating the mechanical strength of vapor phase soldered chip components joints
In our experiment the mechanical strength of solder joints formed by Vapor Phase soldering
was investigated. A testboard was designed, which allowed fifty pieces of 0603 size chip …
was investigated. A testboard was designed, which allowed fifty pieces of 0603 size chip …
Reliability Characteristics of a Package-on-Package with Temperature/Humidity Test, Temperature Cycling Test, and High Temperature Storage Test
D Park, TS Oh - Journal of the Microelectronics and Packaging …, 2016 - koreascience.kr
Reliability characteristics of thin package-on-packages were evaluated using T/H
(temperature/humidity) test at $85^{\circ} C/85% $ for 500 hours, TC (temperature cycling) …
(temperature/humidity) test at $85^{\circ} C/85% $ for 500 hours, TC (temperature cycling) …
Comparing the intermetallic layer formation of Infrared and Vapour Phase soldering
In our experiment the intermetallic layer (IML) formation during Infrared (IR) and Vapour
Phase (VP) soldering was investigated. A testboard was designed, onto which fifty pieces of …
Phase (VP) soldering was investigated. A testboard was designed, onto which fifty pieces of …
Experimental and statistical study in adhesion features of bonded interfaces of IC packages
CH Chien, T Chen, WB Lin, CC Hsieh, YD Wu… - Microelectronics …, 2008 - Elsevier
The existence of defects in the corresponding interfaces can gradually degrade the
interfacial adhesion when the flip chip package is exposed to the high temperature and …
interfacial adhesion when the flip chip package is exposed to the high temperature and …