Performance bugs due to false sharing do not man-ifest as observable correctness errors,
and hence are challenging to detect and repair. Prior approaches aim to both detect and …

Efficient Total Store Order (TSO) implementations allow loads to execute speculatively out-of-
order. To detect order violations, the load queue (LQ) holds all the in-flight loads and is …

Cache coherence protocols such as MESI that use writer-initiated invalidation have high
complexity and sometimes have poor performance and energy usage, especially under …

Modern shared-memory systems have erroneous, undefined behavior for programs that are
not well synchronized. A promising solution is to provide fail-stop memory consistency …

The widespread use of multicore processors has made parallelism a necessity for
performance. However, parallelism allows programs to share physical computing resources …