Analog circuit optimization system based on hybrid evolutionary algorithms
This paper investigates a hybrid evolutionary-based design system for automated sizing of
analog integrated circuits (ICs). A new algorithm, called competitive co-evolutionary …
analog integrated circuits (ICs). A new algorithm, called competitive co-evolutionary …
Electronically tunable higher-order quadrature oscillator employing CDBA
A higher-order Quadrature Sinusoidal Oscillator (QSO) topology using Current Differencing
Buffered Amplifier (CDBA) as an active device is investigated. The proposed oscillator …
Buffered Amplifier (CDBA) as an active device is investigated. The proposed oscillator …
A memetic approach to the automatic design of high-performance analog integrated circuits
This article introduces an evolution-based methodology, named memetic single-objective
evolutionary algorithm (MSOEA), for automated sizing of high-performance analog …
evolutionary algorithm (MSOEA), for automated sizing of high-performance analog …
[图书][B] Electronic design automation of multi-scroll chaos generators
JMM Pacheco, ET Cuautle - 2010 - books.google.com
This book is unique when compared with books on non-linear circuits and systems. The
book introduces novel concepts of physics, computer and electrical engineering. The …
book introduces novel concepts of physics, computer and electrical engineering. The …
Adaptive sized quasi-Monte Carlo based yield aware analog circuit optimization tool
This paper proposes an efficient Quasi-Monte Carlo based yield aware analog circuit
synthesis tool with an adaptive sampling mechanism. Monte Carlo (MC) analysis is …
synthesis tool with an adaptive sampling mechanism. Monte Carlo (MC) analysis is …
Static power reduction using variation-tolerant and reconfigurable multi-mode power switches
Z Zhang, X Kavousianos, K Chakrabarty… - … Transactions on Very …, 2013 - ieeexplore.ieee.org
Multithreshold CMOS is very effective for reducing standby leakage power during long
periods of inactivity. Recently, a power-gating scheme was presented to support multiple …
periods of inactivity. Recently, a power-gating scheme was presented to support multiple …
An analog circuit synthesis tool based on efficient and reliable yield estimation
Analog circuit design has become a very challenging and time consuming process for circuit
designers due to increased non-idealities and worsening variability phenomena. In order to …
designers due to increased non-idealities and worsening variability phenomena. In order to …
A robust and reconfigurable multi-mode power gating architecture
Z Zhang, X Kavousianos, K Chakrabarty… - … Conference on VLSI …, 2011 - ieeexplore.ieee.org
Multi-threshold CMOS is a very effective technique for reducing standby leakage power
during long periods of inactivity. Recently, a power-gating scheme was presented to support …
during long periods of inactivity. Recently, a power-gating scheme was presented to support …
Analog building blocks optimization for low-pass filter of IEEE 802.11 n wireless lan: Ota and ccii
E Alaybeyoğlu, F Ugranli - IEEE Transactions on Computer …, 2020 - ieeexplore.ieee.org
The design process of analog circuits is a challenging issue due to the nonidealities. Thus,
analog IC design must be automated to shorten the design time and must be optimized to …
analog IC design must be automated to shorten the design time and must be optimized to …
[图书][B] IC design analysis, optimization and reuse via machine learning
W Qi - 2017 - search.proquest.com
Since the introduction of theMoore's law in 1965, the integrated circuit industry has
successfully managed over 50 years of exponential growth in design complexity and the …
successfully managed over 50 years of exponential growth in design complexity and the …