Extended-source double-gate tunnel FET with improved DC and analog/RF performance
In this article, we propose an extended-source double-gate tunnel field-effect transistor
(ESDG-TFET) to enhance the dc and analog/RF performance. The source of an ESDG-TFET …
(ESDG-TFET) to enhance the dc and analog/RF performance. The source of an ESDG-TFET …
Impact of gate–source overlap on the device/circuit analog performance of line TFETs
A Acharya, AB Solanki, S Glass… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
The gate–source overlap length () in the line tunneling FET (L-TFET) can be used as a
design parameter to improve the analog circuit performance. In this paper, we investigate …
design parameter to improve the analog circuit performance. In this paper, we investigate …
Investigation of noise characteristics in gate-source overlap tunnel field-effect transistor
The analog circuit performance of tunnel field-effect-transistor (TFET) can be improved by
implementing the concept of gate-source overlap. This paper investigates the impact of …
implementing the concept of gate-source overlap. This paper investigates the impact of …
Output conductance at saturation like region on Line-TFET for different dimensions
W Gonçalez Filho, JA Martino… - 2019 34th Symposium …, 2019 - ieeexplore.ieee.org
This work presents the behavior of Line Tunneling Field Effect Transistors (Line-TFET) at the
saturation like region with different device's dimensions. In spite of the drain current and …
saturation like region with different device's dimensions. In spite of the drain current and …
Epitaxial Layer‐Based Si/SiGe Hetero‐Junction Line Tunnel FETs: A Physical Insight
Modern semiconductor devices have established a new dimension in handheld consumer
and healthcare electronics, such as tablet PC, smartphones, and sensors. This requires an …
and healthcare electronics, such as tablet PC, smartphones, and sensors. This requires an …
Design of Low Power Analog/RF Signal Processing Circuits Using 22 nm Silicon-on-Insulator Schottky Barrier Nano-Wire MOSFET
J Kumar, AN Mahajan, SS Deswal… - … Journal of High …, 2024 - World Scientific
The gate-all-around (GAA) silicon-on-insulator (SOI) Schottky barrier (SB) nano-wire (NW)
MOSFET was recently proposed for low-power and high-frequency analog and radio …
MOSFET was recently proposed for low-power and high-frequency analog and radio …
The Influence of Oxide Thickness and Indium Amount on the Analog Parameters of InxGa1–xAs nTFETs
CCM Bordallo, JA Martino… - … on Electron Devices, 2017 - ieeexplore.ieee.org
The basic analog parameters of three splits of In x Ga 1-x As nTFETs are analyzed for the
first time. The first two splits are In 0.53 Ga 0.47 As devices with a 3-nm HfO 2/1-nm Al 2 O 3 …
first time. The first two splits are In 0.53 Ga 0.47 As devices with a 3-nm HfO 2/1-nm Al 2 O 3 …
Analog parameters of solid source Zn diffusion InXGa1− XAs nTFETs down to 10 K
C Bordallo, JA Martino, PGD Agopian… - Semiconductor …, 2016 - iopscience.iop.org
The analog parameters of In 0.53 Ga 0.47 As and In 0.7 Ga 0.3 As nTFETs with solid state
Zn diffused source are investigated from room temperature down to 10 K. The In 0.7 Ga 0.3 …
Zn diffused source are investigated from room temperature down to 10 K. The In 0.7 Ga 0.3 …
Influence of Fundamental Parameters on the Intrinsic Voltage Gain of Organic Thin Film Transistors
Y Li, L Portilla, C Kim - Electronic Materials Letters, 2021 - Springer
The intrinsic gain is a key metric in analog electronics, it is the highest gain that can be
obtained for an amplifier in the transistor configuration. However, there lack the …
obtained for an amplifier in the transistor configuration. However, there lack the …
Experimental behavior of Line-TFET applied to Low-Dropout Voltage Regulator
W de Lima Silva, PG Der Agopian… - 2022 36th Symposium …, 2022 - ieeexplore.ieee.org
This work presents the design of Low Dropout Voltage Regulator (LDO) with Line-Tunnel
Field Effect Transistor (Line-TFET), in which the transistor was modeled using Verilog-A and …
Field Effect Transistor (Line-TFET), in which the transistor was modeled using Verilog-A and …