Unraveling Attacks to Machine Learning-Based IoT Systems: A Survey and the Open Libraries Behind Them

C Liu, B Chen, W Shao, C Zhang… - IEEE Internet of …, 2024 - ieeexplore.ieee.org
The advent of the Internet of Things (IoT) has brought forth an era of unprecedented
connectivity, with an estimated 80 billion smart devices expected to be in operation by the …

{Side-Channel} Attacks on Optane Persistent Memory

S Liu, S Kanniwadi, M Schwarzl, A Kogler… - 32nd USENIX Security …, 2023 - usenix.org
There is a constant evolution of technology for cloud environments, including the
development of new memory storage technology, such as persistent memory. The newly …

A design space exploration and evaluation for main-memory hash joins in storage class memory

W Huang, Y Ji, X Zhou, B He, KL Tan - Proceedings of the VLDB …, 2023 - dl.acm.org
In this paper, we seek to perform a rigorous experimental study of main-memory hash joins
in storage class memory (SCM). In particular, we perform a design space exploration in real …

Leakage power attack resilient Schmitt trigger based 12T symmetric SRAM cell

SF Naz, AP Shah, N Gupta - Microelectronics Journal, 2023 - Elsevier
In this paper, a new 12T Schmitt trigger based SRAM cell is proposed in 40 nm technology.
The proposed SRAM cell is resilient to leakage power attack (LPA), which is one of the main …

[PDF][PDF] GoFetch: Breaking constant-time cryptographic implementations using data memory-dependent prefetchers

B Chen, Y Wang, P Shome, CW Fletcher… - Proc. USENIX Secur …, 2024 - usenix.org
Microarchitectural side-channel attacks have shaken the foundations of modern processor
design. The cornerstone defense against these attacks has been to ensure that security …

[PDF][PDF] Sync+ Sync: A Covert Channel Built on fsync with Storage

Q Jiang, C Wang - arXiv preprint arXiv:2309.07657, 2023 - usenix.org
Scientists have built a variety of covert channels for secretive information transmission with
CPU cache and main memory. In this paper, we turn to a lower level in the memory …

I/O Transit Caching for PMem-based Block Device

Q Xu, Q Jiang, C Wang - arXiv preprint arXiv:2403.06120, 2024 - arxiv.org
Byte-addressable non-volatile memory (NVM) sitting on the memory bus is employed to
make persistent memory (PMem) in general-purpose computing systems and embedded …

Snapshot: Fast, Userspace Crash Consistency for CXL and PM Using msync

S Mahar, M Shen, T Kelly… - 2023 IEEE 41st …, 2023 - ieeexplore.ieee.org
Crash consistency using persistent memory programming libraries requires programmers to
use complex transactions and manual annotations. In contrast, the failure-atomic msync …

Caiti: I/O transit caching for persistent memory-based block device

Q Xu, Q Jiang, C Wang - Journal of Systems Architecture, 2024 - Elsevier
Byte-addressable non-volatile memory (NVM) sitting on the memory bus is employed to
make persistent memory (pmem) in general-purpose computing systems and embedded …

结合决策树和AdaBoost 的缓存侧信道攻击检测

李扬, 尹大鹏, 马自强, 姚梓豪, 魏良根 - 计算机工程与科学, 2024 - joces.nudt.edu.cn
缓存侧信道攻击严重威胁各类系统的安全, 对攻击进行检测可以有效阻断攻击. 为此,
提出了一种基于决策树和AdaBoost 的AD 检测模型, 通过匹配系统硬件事件信息特征 …