Low-power CMOS digital design

AP Chandrakasan, S Sheng… - IEICE Transactions on …, 1992 - search.ieice.org
Motivated by emerging battery-operated applications that demand intensive computation in
portable environments, techniques are investigated which reduce power consumption in …

Mitigating measurement errors in quantum computers by exploiting state-dependent bias

SS Tannu, MK Qureshi - Proceedings of the 52nd annual IEEE/ACM …, 2019 - dl.acm.org
Quantum computers are susceptible to errors. While quantum computers can be guarded
against errors using error correction codes, near-term quantum computers will not have …

Bus-invert coding for low-power I/O

MR Stan, WP Burleson - IEEE Transactions on very large scale …, 1995 - ieeexplore.ieee.org
Technology trends and especially portable applications drive the quest for low-power VLSI
design. Solutions that involve algorithmic, structural or physical transformations are sought …

A survey of encoding techniques for reducing data-movement energy

S Mittal, S Nag - Journal of Systems Architecture, 2019 - Elsevier
In modern processors, data-movement consumes two orders of magnitude higher energy
than a floating-point operation and hence, data-movement is becoming the primary …

[图书][B] On-chip communication architectures: system on chip interconnect

S Pasricha, N Dutt - 2010 - books.google.com
Over the past decade, system-on-chip (SoC) designs have evolved to address the ever
increasing complexity of applications, fueled by the era of digital convergence …

Power minimization in IC design: Principles and applications

M Pedram - ACM Transactions on Design Automation of Electronic …, 1996 - dl.acm.org
Low power has emerged as a principal theme in today's electronics industry. The need for
low power has caused a major paradigm shift in which power dissipation is as important as …

Power optimization and management in embedded systems

M Pedram - Proceedings of the 2001 Asia and South Pacific Design …, 2001 - dl.acm.org
Power-efficient design requires reducing power dissipation in all parts of the design and
during all stages of the design process subject to constraints on the system performance and …

A survey of optimization techniques targeting low power VLSI circuits

S Devadas, S Malik - Proceedings of the 32nd annual ACM/IEEE Design …, 1995 - dl.acm.org
A Survey of Optimization Techniques Targeting Low Power VLSI Circuits Page 1 A Survey of
Optimization Techniques Targeting Low Power VLSI Circuits Srinivas Devadas Sharad Malik …

Asymptotic zero-transition activity encoding for address busses in low-power microprocessor-based systems

L Benini, G De Micheli, E Macii… - … Lakes Symposium on …, 1997 - ieeexplore.ieee.org
In microprocessor-based systems, large power savings can be achieved through reduction
of the transition activity of the on-and off-chip buses. This is because the total capacitance …

High-level power modeling, estimation, and optimization

E Macii, M Pedram, F Somenzi - Proceedings of the 34th annual Design …, 1997 - dl.acm.org
In the past, the major concern of the VLSI designers werearea, performance, cost, and
reliability. In recent years, however, this has changed and, increasingly, power is beinggiven …