A survey on techniques for improving Phase Change Memory (PCM) lifetime
M Mohseni, AH Novin - Journal of Systems Architecture, 2023 - Elsevier
ABSTRACT PCMs are Non-Volatile Memories (NVMs) that store data using phase-change
semiconductors, such as silicon-chalcogenide glass. In addition to increased integration …
semiconductors, such as silicon-chalcogenide glass. In addition to increased integration …
Mitigating wordline crosstalk using adaptive trees of counters
SM Seyedzadeh, AK Jones… - 2018 ACM/IEEE 45th …, 2018 - ieeexplore.ieee.org
DRAM technology scaling has the undesirable side effect of degrading cell reliability. One
such concern of deeply scaled DRAMs is the increased coupling between adjacent cells …
such concern of deeply scaled DRAMs is the increased coupling between adjacent cells …
Optimizing Systems for {Byte-Addressable}{NVM} by Reducing Bit Flipping
New byte-addressable non-volatile memory (BNVM) technologies such as phase change
memory (PCM) enable the construction of systems with large persistent memories …
memory (PCM) enable the construction of systems with large persistent memories …
Leveraging ecc to mitigate read disturbance, false reads and write faults in stt-ram
Designing reliable systems using scaled Spin-Transfer Torque Random Access Memory
(STT-RAM) has become a significant challenge as the memory technology feature size is …
(STT-RAM) has become a significant challenge as the memory technology feature size is …
Mitigating bitline crosstalk noise in dram memories
DRAM cells in deeply scaled CMOS confront significant challenges to ensure reliable
operation. Parasitic capacitances induced by certain bit storage patterns, or bad patterns …
operation. Parasitic capacitances induced by certain bit storage patterns, or bad patterns …
Dynamic partitioning to mitigate stuck-at faults in emerging memories
Emerging non-volatile memories have many advantages over conventional memory.
Unfortunately, many are susceptible to write endurance challenges, resulting in stuck-at …
Unfortunately, many are susceptible to write endurance challenges, resulting in stuck-at …
CRP: Conditional replacement policy for reliability enhancement of STT-MRAM caches
Driven by the trends of emerging technologies in on-chip memories, with increasing the size
of last-level caches (LLCs), spin-transfer torque magnetic random access memories (STT …
of last-level caches (LLCs), spin-transfer torque magnetic random access memories (STT …
Designing data structures to minimize bit flips on NVM
The advent of byte-addressable non-volatile memory technologies such as phase change
memory (PCM) has spurred a flurry of research on topics including consistency and …
memory (PCM) has spurred a flurry of research on topics including consistency and …
Enabling fine-grain restricted coset coding through word-level compression for pcm
SM Seyedzadeh, A Jones… - 2018 IEEE International …, 2018 - ieeexplore.ieee.org
Phase change memory (PCM) has recently emerged as a promising technology to meet the
fast growing demand for large capacity memory in computer systems, replacing DRAM that …
fast growing demand for large capacity memory in computer systems, replacing DRAM that …
Realizing Extreme Endurance Through Fault-aware Wear Leveling and Improved Tolerance
Phase-change memory (PCM) and resistive memory (RRAM) are promising alternatives to
traditional memory technologies. However, both PCM and RRAM suffer from limited write …
traditional memory technologies. However, both PCM and RRAM suffer from limited write …