Comprehensive review on electrical noise analysis of TFET structures

S Chander, SK Sinha, R Chaudhary - Superlattices and Microstructures, 2022 - Elsevier
Abstract Tunnel Filed Effect Transistors (TFETs) have appeared as an alternative for
conventional CMOS due to their advantages like very low leakage current and steep sub …

Device and circuit-level assessment of GaSb/Si heterojunction vertical tunnel-FET for low-power applications

MR Tripathy, AK Singh, A Samad… - … on Electron Devices, 2020 - ieeexplore.ieee.org
This article investigates the performance of a vertically grown GaSb/Si tunnel field effect
transistor (V-TFET) with a source pocket to enhance the performance of the device. The …

Vertically-grown TFETs: an extensive analysis

AS Geege, TSA Samuel - Silicon, 2023 - Springer
TFET is an exciting device for ultra-low and low power implementations since it improves
electrical performance while also providing steeper switching ratio. This study encloses with …

Numerical assessment of dielectrically-modulated short-double-gate PNPN TFET-based label-free biosensor

K Baruah, S Baishya - Microelectronics Journal, 2023 - Elsevier
A comprehensive investigation of dielectrically modulated Ge-source short double-gate
PNPN tunnel FET (SG-PNPN TFET) based label-free biosensor is presented. Short gates …

Vertical tunneling field-effect transistor with germanium source and T-shaped silicon channel for switching and biosensing applications: A simulation study

IC Cherik, S Mohammadi - IEEE Transactions on Electron …, 2022 - ieeexplore.ieee.org
In this article, we introduce a novel vertical tunneling transistor that uses two germanium
source regions and a T-shaped silicon channel and investigate its performance for low …

Achievement of extremely small subthreshold swing in Vertical Source-All-Around-TFET with suppressed ambipolar conduction

P Ramesh, B Choudhuri - Microelectronics Journal, 2023 - Elsevier
In this manuscript, we come up with a new line-tunneling-based channel-engineered
GaAsSb/GaSb heterojunction Source-All-Around Vertical Nanowire TFET (SAA-NW-VTFET) …

Germanium-source L-shaped TFET with dual in-line tunneling junction

I Chahardah Cherik, S Mohammadi - Applied Physics A, 2021 - Springer
In this paper, we propose a Si/Ge heterojunction TFET with two in-line tunneling junctions to
enhance the low on-state current of TFETs, which is their main drawback. The device …

Switching performance enhancement in nanotube double-gate tunneling field-effect transistor with germanium source regions

IC Cherik, S Mohammadi… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
In this article, we introduce a double-gate nanotube tunneling field-effect transistor with high
scalability based on the Si/Ge heterostructure. Our device includes two Ge source regions …

Noise behavior of vertical tunnel FETs under the influence of interface trap states

VD Wangkheirakpam, B Bhowmick… - Microelectronics …, 2021 - Elsevier
A detailed analysis of low frequency noise behavior of two different vertical TFETs namely
n​+​ pocket VTFET and dual MOS capacitor (D-MOS) VTFET is presented in this work …

Impact of heterogeneous gate dielectric on DC, RF and circuit-level performance of source-pocket engineered Ge/Si heterojunction vertical TFET

MR Tripathy, AK Singh, A Samad… - Semiconductor …, 2020 - iopscience.iop.org
This paper reports the DC, RF and circuit-level performance analysis of short-channel Ge/Si
based source-pocket engineered (SPE) vertical heterojunction tunnel field effect transistors …