Building a large-scale quantum computer requires the co-optimization of both the quantum
bits (qubits) and their control electronics. By operating the CMOS control circuits at cryogenic …

This article presents a physical model of the threshold voltage in MOSFETs valid down to 4.2
K. Interface traps close to the band edge modify the saturating temperature behavior of the …

A scalable, non-multiplexed cryogenic 14-nm FinFET quantum bit (qubit) state controller
(QSC) for use in the semi-autonomous control of superconducting transmon qubits is …

This article presents a fully integrated Cryo-CMOS system on chip (SoC) for quantum
computing. The proposed SoC integrates a radio frequency (RF) pulse modulator for qubit …

This study presents the first in depth characterization of deep cryogenic electrical behavior of
a commercial 16 nm CMOS FinFET technology. This technology is well suited for a broad …

This work presents a self-heating study of a 40-nm bulk-CMOS technology in the ambient
temperature range from 300 K down to 4.2 K. A custom test chip was designed and …

This article presents a cryo-CMOS quantum controller IC for superconducting qubits. The
proposed globally synchronized clock system internally generates different local oscillator …

Quantum computation (QC) is one of the most challenging quantum technologies that
promise to revolutionize data computation in the long-term by outperforming the classical …

This article presents the first cryogenic phase-locked loop (PLL) operating at 4.2 K. The PLL
is designed for the control system of scalable quantum computers. The specifications of PLL …

Cryogenic device models are essential for the reliable design of the cryo-CMOS electronic
interface necessary to build future large-scale quantum computers. This paper reports the …