The speedy family of block ciphers-engineering an ultra low-latency cipher from gate level for secure processor architectures
We introduce SPEEDY, a family of ultra low-latency block ciphers. We mix engineering
expertise into each step of the cipher's design process in order to create a secure encryption …
expertise into each step of the cipher's design process in order to create a secure encryption …
Pt-guard: Integrity-protected page tables to defend against breakthrough rowhammer attacks
Page tables enforce process isolation in systems. Rowhammer attacks break process
isolation by flipping bits in DRAM to tamper page tables and achieving privilege escalation …
isolation by flipping bits in DRAM to tamper page tables and achieving privilege escalation …
The qarmav2 family of tweakable block ciphers
R Avanzi, S Banik, O Dunkelman… - Cryptology ePrint …, 2023 - eprint.iacr.org
We introduce the QARMAv2 family of tweakable block ciphers. It is a redesign of QARMA
(from FSE 2017) to improve its security bounds and allow for longer tweaks, while keeping …
(from FSE 2017) to improve its security bounds and allow for longer tweaks, while keeping …
Revisiting the indifferentiability of the sum of permutations
The sum of two n-bit pseudorandom permutations is known to behave like a pseudorandom
function with n bits of security. A recent line of research has investigated the security of two …
function with n bits of security. A recent line of research has investigated the security of two …
LLLWBC: A new low-latency light-weight block cipher
L Zhang, R Wu, Y Zhang, Y Zheng, W Wu - International Conference on …, 2022 - Springer
Lightweight cipher suitable for resource constrained environment is crucial to the security of
applications such as RFID, Internet of Things, etc. Moreover, in recent years low-latency is …
applications such as RFID, Internet of Things, etc. Moreover, in recent years low-latency is …
Cryptanalysis of reduced round SPEEDY
SPEEDY is a family of ultra low latency block ciphers proposed by Leander, Moos, Moradi
and Rasoolzadeh at TCHES 2021. Although the designers gave some differential/linear …
and Rasoolzadeh at TCHES 2021. Although the designers gave some differential/linear …
Gleeok: A Family of Low-Latency PRFs and its Applications to Authenticated Encryption
R Anand, S Banik, A Caforio, T Ishikawa… - IACR Transactions on …, 2024 - tches.iacr.org
Gleeok: A Low-Latency PRF Page 1 IACR Transactions on Cryptographic Hardware and
Embedded Systems ISSN 2569-2925, Vol. 2024, No. 2, pp. 545–587. DOI:10.46586/tches.v2024.i2.545-587 …
Embedded Systems ISSN 2569-2925, Vol. 2024, No. 2, pp. 545–587. DOI:10.46586/tches.v2024.i2.545-587 …
Mind the Composition of Toffoli Gates: Structural Algebraic Distinguishers of ARADI
E Bellini, M Rachidi, R Rohit, SK Tiwari - Cryptology ePrint Archive, 2024 - eprint.iacr.org
This paper reveals a critical flaw in the design of ARADI, a recently proposed low-latency
block cipher by NSA researchers--Patricia Greene, Mark Motley, and Bryan Weeks. The …
block cipher by NSA researchers--Patricia Greene, Mark Motley, and Bryan Weeks. The …
Energy Consumption of Protected Cryptographic Hardware Cores: An Experimental Study
The rapid deployment of the Internet of Things (IoT) brought some interesting topics into the
spotlight, one of which is low-power design. IoT devices are usually deployed in …
spotlight, one of which is low-power design. IoT devices are usually deployed in …
An efficient strategy to construct a better differential on multiple-branch-based designs: application to orthros
As low-latency designs tend to have a small number of rounds to decrease latency, the
differential-type cryptanalysis can become a significant threat to them. In particular, since a …
differential-type cryptanalysis can become a significant threat to them. In particular, since a …