In this brief an improved Dickson charge pump (DCP) topology exploiting a clock boosting is
presented. An accurate while simple theoretical model for the dynamic behavior of the …

This brief proposes a 3-stage dual-branch charge pump (CP) with an advanced dynamic
gate-biasing technique (DGB) enabling ultra-low-voltage (0.1 V) energy harvesting …

This paper introduces a design strategy to reduce rise time of charge pumps maintaining
equal the silicon area, which is effective when the load capacitance is lower than the total …

A hybrid charge pump was developed in a 0.13-μm Bipolar-CMOS-DMOS (BCD) process
which utilised high drain-source voltage MOS devices and low-voltage integrated metal …

This brief presents a high efficiency fully integrated high-voltage (HV) pulse driver in
standard CMOS. Powered by a standard I/O DC voltage of 2.5 V, the proposed system …

A novel frequency boosting design technique for charge pump architectures is proposed,
enabling high speed performance with no additional circuitry or design complexity. The …

This paper introduces a novel approach to designing energy-efficient Dickson charge
pumps with linear distributed total capacitance. Theoretical analysis shows that the input …

This paper introduces a Dickson voltage multiplier topology which includes a triple voltage
booster to achieve better performance in terms of speed at the same maximum output …

In this work a novel charge pump design is presented with a primary focus on minimizing the
associated silicon footprint while offering efficient step up conversion. The topology enables …

This paper presents a method for optimizing the sizes of the flying capacitors when using
different types of devices in the same integrated charge pump. Higher power density can be …