This paper reviews special RF/microwave silicon device implementations in a process that
allows two-sided contacting of the devices: the back-wafer contacted Silicon-On-Glass …

This paper presents the results of comparative reliability study of two accelerated ageing
tests for thermal stress applied to power RF LDMOS: Thermal Shock Tests (TST, air–air test) …

A method is provided for fabricating a silicon (Si)-on-insulator (SOI) double-diffused metal
oxide semiconductor transistor (DMOST) with a stepped channel thickness. The method …

In this paper, electrothermal consequences of downscaling bipolar transistors, reducing the
emitter resistance and implementing substrate modifications are examined by means of …

This paper presents a silicon-on-insulator (SOI) integration technology, including structures
and processes of OFF-gate power nMOSFETs, conventional lightly doped drain (LDD) …

Physical-vapor-deposited aluminium nitride has been integrated in a silicon-on-glass NPN
BJT process. Deposition conditions have been developed for which suitable electrical …

Power trench MOSFET devices have been accomplished on Cu substrates using a novel
silicon-on-metal (SOM) technology. This technology transfers silicon trench MOSFET device …

Thermally induced current bifurcation in multifinger bipolar transistors is studied by means of
three novel and efficient methods that are based on the same electrothermal model for the …

An integrated circuit assembly is formed with an insulating layer, a semiconductor layer, an
active device, first, second, and third electrically conductive interconnect layers, and a …

SUMMARY OF THE INVENTION A unique high Voltage high-power device structure is pre
sented that can be fabricated using SOI wafers with top active silicon layer as thin as 20 …