Impact of voltage scaling on soft errors susceptibility of multicore server cpus
Microprocessor power consumption and dependability are both crucial challenges that
designers have to cope with due to shrinking feature sizes and increasing transistor counts …
designers have to cope with due to shrinking feature sizes and increasing transistor counts …
Adaptive voltage/frequency scaling and core allocation for balanced energy and performance on multicore cpus
G Papadimitriou, A Chatzidimitriou… - … symposium on high …, 2019 - ieeexplore.ieee.org
Energy efficiency is a known major concern for computing system designers. Significant
effort is devoted to power optimization of modern systems, especially in large-scale …
effort is devoted to power optimization of modern systems, especially in large-scale …
Exceeding conservative limits: A consolidated analysis on modern hardware margins
G Papadimitriou, A Chatzidimitriou… - … on Device and …, 2020 - ieeexplore.ieee.org
Modern large-scale computing systems (data centers, supercomputers, cloud and edge
setups and high-end cyber-physical systems) employ heterogeneous architectures that …
setups and high-end cyber-physical systems) employ heterogeneous architectures that …
Workload-aware dram error prediction using machine learning
L Mukhanov, K Tovletoglou… - 2019 IEEE …, 2019 - ieeexplore.ieee.org
The aggressive scaling of technology may have helped to meet the growing demand for
higher memory capacity and density, but has also made DRAM cells more prone to errors …
higher memory capacity and density, but has also made DRAM cells more prone to errors …
Modern hardware margins: CPUs, GPUs, FPGAs recent system-level studies
D Gizopoulos, G Papadimitriou… - 2019 IEEE 25th …, 2019 - ieeexplore.ieee.org
Modern large-scale computing systems (data centers, supercomputers, cloud and edge
setups and high-end cyber-physical systems) employ heterogeneous architectures that …
setups and high-end cyber-physical systems) employ heterogeneous architectures that …
Dstress: Automatic synthesis of dram reliability stress viruses using genetic algorithms
L Mukhanov, DS Nikolopoulos… - 2020 53rd Annual …, 2020 - ieeexplore.ieee.org
Failures become inevitable in DRAM devices, which is a major obstacle for scaling down the
density of cells in future DRAM technologies. These failures can be detected by specific …
density of cells in future DRAM technologies. These failures can be detected by specific …
Assessing the effects of low voltage in branch prediction units
A Chatzidimitriou, G Papadimitriou… - … Analysis of Systems …, 2019 - ieeexplore.ieee.org
Branch prediction units are key performance components in modern microprocessors as
they are widely used to address control hazards and minimize misprediction stalls. The …
they are widely used to address control hazards and minimize misprediction stalls. The …
Healthlog monitor: Errors, symptoms and reactions consolidated
A Chatzidimitriou, G Papadimitriou… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
Advances in reliability research have presented novel techniques for early identification of
upcoming failures (both long-term and short-term) as well as sophisticated isolation and …
upcoming failures (both long-term and short-term) as well as sophisticated isolation and …
Exploring the potential of context-aware dynamic CPU undervolting
CPU operation at sub-nominal voltage levels has been researched to reduce the power and
energy consumption of computer systems. While it is possible to determine a safe …
energy consumption of computer systems. While it is possible to determine a safe …
Microarchitecture-aware timing error prediction via deep neural networks
S Tompazi, G Karakonstantis - … on On-Line Testing and Robust …, 2023 - ieeexplore.ieee.org
Nanometer circuits are becoming increasingly prone to timing errors due to worsening
parametric variations and operation close to voltage and frequency limits. Such errors …
parametric variations and operation close to voltage and frequency limits. Such errors …