A compact gate control and voltage-balancing circuit for series-connected SiC MOSFETs and its application in a DC breaker
This paper presents a novel compact circuit combining function of gate control and voltage
balancing for series-connected silicon carbide (SiC) metal-oxide-semiconductor field-effect …
balancing for series-connected silicon carbide (SiC) metal-oxide-semiconductor field-effect …
Short-circuit degradation of 10-kV 10-A SiC MOSFET
The short-circuit behavior of power devices is highly relevant for converter design and fault
protection. In this paper, the degradation during short circuit of a 10-kV 10-A 4H-SiC …
protection. In this paper, the degradation during short circuit of a 10-kV 10-A 4H-SiC …
Investigation of off-state stress induced degradation of SiC MOSFETs under short-circuit condition
J Kang, Q Liu, H Luo, H Cao… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
Investigation of silicon carbide (SiC) mosfet s short-circuit (SC) degradation mechanism is
critical to improve the overall reliability of power converters. At present, research on the SiC …
critical to improve the overall reliability of power converters. At present, research on the SiC …
Review of methodologies for evaluating short-circuit robustness and reliability of SiC power MOSFETs
To accelerate the broad application of silicon carbide (SiC) power MOSFETs, their short-
circuit (SC) robustness and reliability must be thoroughly evaluated. This article, therefore …
circuit (SC) robustness and reliability must be thoroughly evaluated. This article, therefore …
Short-circuit characterization of 10 kV 10A 4H-SiC MOSFET
The short-circuit capability of a power device is highly relevant for converter design and fault
protection. In this paper a 10kV 10A 4H-SiC MOSFET is characterized and its short circuit …
protection. In this paper a 10kV 10A 4H-SiC MOSFET is characterized and its short circuit …
An intelligent medium voltage gate driver with enhanced short circuit protection scheme for 10kV 4H-SiC MOSFETs
A Kumar, A Ravichandran, S Singh… - 2017 IEEE Energy …, 2017 - ieeexplore.ieee.org
Designing of gate drivers for high voltage SiC power devices in medium voltage applications
is challenging due to high dv/dt and di/dt at the switching instants. During short circuit fault …
is challenging due to high dv/dt and di/dt at the switching instants. During short circuit fault …
Design of a gate-driving cell for enabling extended SiC MOSFET voltage blocking
A series connection of SiC MOSFETs for kV blocking capability can enable more design
flexibility in modular multi-level converters as well as other topologies. In this paper, a novel …
flexibility in modular multi-level converters as well as other topologies. In this paper, a novel …
Multi-step packaging concept for series-connected SiC MOSFETs
LFS Alves, P Lefranc, PO Jeannin… - 2019 21st European …, 2019 - ieeexplore.ieee.org
This paper presents a Multi-Step Packaging (MSP) concept for optimizing implementation of
series-connected SiC-MOSFETs devices. The proposed package geometry considers …
series-connected SiC-MOSFETs devices. The proposed package geometry considers …
Gate driver architectures impacts on voltage balancing of SiC MOSFETs in series connection
LFS Alves, VS Nguyen, P Lefranc… - 2018 20th European …, 2018 - ieeexplore.ieee.org
In power converter configurations like multi-cell, multi-level, series connection of power
devices etc. under very high switching speeds, several dv/dt sources generated at different …
devices etc. under very high switching speeds, several dv/dt sources generated at different …
Analysis of the multi-steps package (MSP) for series-connected SiC-MOSFETs
LFS Alves, P Lefranc, PO Jeannin, B Sarrazin… - Electronics, 2020 - mdpi.com
In this paper, a multi-step packaging (MSP) concept for series-connected SiC-MOSFETs is
analyzed. The parasitic capacitance generated by the dielectric isolation of each device in …
analyzed. The parasitic capacitance generated by the dielectric isolation of each device in …