Emerging steep-slope devices and circuits: Opportunities and challenges
While continuing the CMOS scaling-down becomes unprecedentedly more challenging than
before, intensive exploration on beyond-CMOS nanodevice technologies is an appealing …
before, intensive exploration on beyond-CMOS nanodevice technologies is an appealing …
Power-efficient heterogeneous many-core design with ncfet technology
Multi-/many-core, homogeneous or heterogeneous architectures, using the existing CMOS
technology are inevitably approaching the limit of attainable power efficiency due to the …
technology are inevitably approaching the limit of attainable power efficiency due to the …
Enabling Internet-of-Things with opportunities brought by emerging devices, circuits and architectures
In recent years, the concept of Internet-of-Things (IoT) has attracted significant interests.
Required by the applications, the IoT power optimization has become the key concern …
Required by the applications, the IoT power optimization has become the key concern …
HetCore: TFET-CMOS hetero-device architecture for CPUs and GPUs
Tunneling Field-Effect Transistors (TFETs) attain much higher energy efficiency than CMOS
at low voltages. However, their performance saturates at high voltages and, therefore …
at low voltages. However, their performance saturates at high voltages and, therefore …
PROCEED: A Pareto optimization-based circuit-level evaluator for emerging devices
S Wang, A Pan, CO Chui… - IEEE Transactions on Very …, 2015 - ieeexplore.ieee.org
Evaluation of novel devices in the context of circuits is crucial to identifying and maximizing
their value. We propose a new framework, Pareto optimization-based circuit-level evaluator …
their value. We propose a new framework, Pareto optimization-based circuit-level evaluator …
A high-efficiency switched-capacitance HTFET charge pump for low-input-voltage applications
This paper presents a high-efficiency switched-capacitance charge pump in 20 nm III-V
heterojunction tunnel field-effect transistor (HTFET) technology for low-input-voltage …
heterojunction tunnel field-effect transistor (HTFET) technology for low-input-voltage …
Enabling power-efficient designs with III-V tunnel FETs
III-V Tunnel FETs (TFET) possess unique characteristics such as steep slope switching, high
gm/IDS, uni-directional conduction, and low voltage operating capability. These …
gm/IDS, uni-directional conduction, and low voltage operating capability. These …
Sub-10 nm FinFETs and tunnel-FETs: From devices to systems
In this paper, a detailed device/circuit/system level assessment of sub-10nm GaSb-InAs
Tunneling Field Effect Transistors (TFET) versus Silicon FinFETs operating at near-threshold …
Tunneling Field Effect Transistors (TFET) versus Silicon FinFETs operating at near-threshold …
A CNN-inspired mixed signal processor based on tunnel transistors
Novel devices are under investigation to extend the performance scaling trends that have
long been associated with Moore's Law-based device scaling. Among the emerging devices …
long been associated with Moore's Law-based device scaling. Among the emerging devices …
Thermal-aware application scheduling on device-heterogeneous embedded architectures
The challenges of the Power Wall manifest in mobile and embedded processors due to their
inherent thermal and formfactor constraints. The power dissipated over a fixed area, namely …
inherent thermal and formfactor constraints. The power dissipated over a fixed area, namely …