As most of the real-world problems are imprecise, dedicating a lot of hardware for precise
computations is futile for low-power applications and few applications where the precision is …

This review article presents a systematic exploration of N-bit Vedic multipliers, focusing on
the technological approaches utilized for their front-end and back-end stage …

ASIC design of a high speed low power circuit for factorial calculation of a number is
reported in this paper. The factorial of a number can be calculated using iterative …

In current day situation we come across numerous mathematical challenges. This could be
overwhelmed by the Vedic Mathematics. Vedic Mathematics is an ancient approach to solve …

This brief presents a low-power architecture for the design of a one-dimension median filter.
It is a word-level two-stage pipelined filter, receiving an input sample and generating a …

Multipliers are the building blocks of every digital signal processor (DSP). The performance
of any digital system is dependent on the adder design and to a large extent on the multiplier …

Resistive Random-Access Memory (RRAM) is well-suited to accelerate neural network (NN)
workloads as RRAM-based Processing-in-Memory (PIM) architectures natively support …

The electrocardiogram (ECG) is a biological signal that is frequently employed and plays a
significant role in cardiac analysis. In the analysis of important indicators of the distribution of …

In this work, power efficient butterfly unit based FFT architecture is presented. The butterfly
unit is designed using floating-point fused arithmetic units. The fused arithmetic units include …

Multiplication is one of the important operations in many signal processing applications such
as digital filters design, fast Fourier transform (FFT), discrete Fourier transform (DFT) …