An empirical guide to the behavior and use of scalable persistent memory

J Yang, J Kim, M Hoseinzadeh, J Izraelevitz… - … USENIX Conference on …, 2020 - usenix.org
After nearly a decade of anticipation, scalable nonvolatile memory DIMMs are finally
commercially available with the release of Intel's Optane DIMM. This new nonvolatile DIMM …

Basic performance measurements of the intel optane DC persistent memory module

J Izraelevitz, J Yang, L Zhang, J Kim, X Liu… - arXiv preprint arXiv …, 2019 - arxiv.org
Scalable nonvolatile memory DIMMs will finally be commercially available with the release
of the Intel Optane DC Persistent Memory Module (or just" Optane DC PMM"). This new …

PUMA: A programmable ultra-efficient memristor-based accelerator for machine learning inference

A Ankit, IE Hajj, SR Chalamalasetti, G Ndu… - Proceedings of the …, 2019 - dl.acm.org
Memristor crossbars are circuits capable of performing analog matrix-vector multiplications,
overcoming the fundamental energy efficiency limitations of digital logic. They have been …

{NOVA}: A log-structured file system for hybrid {Volatile/Non-volatile} main memories

J Xu, S Swanson - 14th USENIX Conference on File and Storage …, 2016 - usenix.org
Fast non-volatile memories (NVMs) will soon appear on the processor memory bus
alongside DRAM. The resulting hybrid memory systems will provide software with sub …

Recipe: Converting concurrent dram indexes to persistent-memory indexes

SK Lee, J Mohan, S Kashyap, T Kim… - Proceedings of the 27th …, 2019 - dl.acm.org
We present Recipe, a principled approach for converting concurrent DRAM indexes into
crash-consistent indexes for persistent memory (PM). The main insight behind Recipe is that …

Flatstore: An efficient log-structured key-value storage engine for persistent memory

Y Chen, Y Lu, F Yang, Q Wang, Y Wang… - Proceedings of the Twenty …, 2020 - dl.acm.org
Emerging hardware like persistent memory (PM) and high-speed NICs are promising to
build efficient key-value stores. However, we observe that the small-sized access pattern in …

{Write-Optimized} and {High-Performance} hashing index scheme for persistent memory

P Zuo, Y Hua, J Wu - 13th USENIX Symposium on Operating Systems …, 2018 - usenix.org
Non-volatile memory (NVM) as persistent memory is expected to substitute or complement
DRAM in memory hierarchy, due to the strengths of non-volatility, high density, and near …

Dash: Scalable hashing on persistent memory

B Lu, X Hao, T Wang, E Lo - arXiv preprint arXiv:2003.07302, 2020 - arxiv.org
Byte-addressable persistent memory (PM) brings hash tables the potential of low latency,
cheap persistence and instant recovery. The recent advent of Intel Optane DC Persistent …

Endurable transient inconsistency in {Byte-Addressable} persistent {B+-Tree}

D Hwang, WH Kim, Y Won, B Nam - 16th USENIX Conference on File …, 2018 - usenix.org
With the emergence of byte-addressable persistent memory (PM), a cache line, instead of a
page, is expected to be the unit of data transfer between volatile and nonvolatile devices, but …

{Write-Optimized} dynamic hashing for persistent memory

M Nam, H Cha, Y Choi, SH Noh, B Nam - 17th USENIX Conference on …, 2019 - usenix.org
Low latency storage media such as byte-addressable persistent memory (PM) requires
rethinking of various data structures in terms of optimization. One of the main challenges in …