A review on quantum computing: From qubits to front-end electronics and cryogenic MOSFET physics

F Jazaeri, A Beckers, A Tajalli… - 2019 MIXDES-26th …, 2019 - ieeexplore.ieee.org
Quantum computing (QC) has already entered the industrial landscape and several
multinational corporations have initiated their own research efforts. So far, many of these …

Energy-efficient computing at cryogenic temperatures

C Zota, A Ferraris, E Cha, M Prathapan, P Mueller… - Nature …, 2024 - nature.com
Increasing demand for data-intense computing applications—such as artificial intelligence,
large language models and high-performance computing—has created a need for …

A cryo-CMOS chip that integrates silicon quantum dots and multiplexed dispersive readout electronics

A Ruffino, TY Yang, J Michniewicz, Y Peng… - Nature …, 2022 - nature.com
As quantum computers grow in complexity, the technology will have to evolve from large
distributed systems to compact integrated solutions. Spin qubits in silicon quantum dots are …

Theoretical limit of low temperature subthreshold swing in field-effect transistors

A Beckers, F Jazaeri, C Enz - IEEE Electron Device Letters, 2019 - ieeexplore.ieee.org
This letter reports a temperature-dependent limit for the subthreshold swing in MOSFETs
that deviates from the Boltzmann limit at deep-cryogenic temperatures. Below a critical …

Cryogenic subthreshold swing saturation in FD-SOI MOSFETs described with band broadening

H Bohuslavskyi, AGM Jansen, S Barraud… - IEEE Electron …, 2019 - ieeexplore.ieee.org
In the standard MOSFET description of the drain current as a function of applied gate
voltage, the subthreshold swing has a fundamental lower limit as a function of temperature …

Compact modeling of temperature effects in FDSOI and FinFET devices down to cryogenic temperatures

G Pahwa, P Kushwaha, A Dasgupta… - … on Electron Devices, 2021 - ieeexplore.ieee.org
We present compact models that capture published cryogenic temperature effects on silicon
carrier mobility and velocity saturation, as well as fully depleted silicon on insulator (FDSOI) …

Physical model of low-temperature to cryogenic threshold voltage in MOSFETs

A Beckers, F Jazaeri, A Grill… - IEEE Journal of the …, 2020 - ieeexplore.ieee.org
This article presents a physical model of the threshold voltage in MOSFETs valid down to 4.2
K. Interface traps close to the band edge modify the saturating temperature behavior of the …

Characterization and modeling of 28-nm FDSOI CMOS technology down to cryogenic temperatures

A Beckers, F Jazaeri, H Bohuslavskyi, L Hutin… - Solid-State …, 2019 - Elsevier
This paper presents an extensive characterization and modeling of a commercial 28-nm
FDSOI CMOS process operating down to cryogenic temperatures. The important cryogenic …

Characterization and modeling of mismatch in cryo-CMOS

M Babaie, E Charbon, A Vladimirescu… - IEEE Journal of the …, 2020 - ieeexplore.ieee.org
This paper presents a device matching study of a commercial 40-nm bulk CMOS technology
operated at cryogenic temperatures. Transistor pairs and linear arrays, optimized for device …

Cryogenic characterization of 16 nm FinFET technology for quantum computing

HC Han, F Jazaeri, A D'Amico… - … 2021-IEEE 47th …, 2021 - ieeexplore.ieee.org
This study presents the first in depth characterization of deep cryogenic electrical behavior of
a commercial 16 nm CMOS FinFET technology. This technology is well suited for a broad …