An energy efficient symmetrical DAC switching scheme for single-ended SAR ADCs with zero reset energy and a 3-stage common-mode insensitive regenerative …
H Pahlavanzadeh, MA Karami - AEU-International Journal of Electronics …, 2022 - Elsevier
A state-of-the-art energy-efficient digital-to-analog converter (DAC) switching scheme
suitable for single-ended successive approximation register (SAR) analog-to-digital …
suitable for single-ended successive approximation register (SAR) analog-to-digital …
A low settling time switching scheme for SAR ADCs with reset‐free regenerative comparator
H Pahlavanzadeh, MA Karami - International Journal of Circuit …, 2023 - Wiley Online Library
This paper presents an energy‐efficient fully differential switching scheme for successive
approximation register (SAR) analog‐to‐digital converters (ADCs). During the sampling …
approximation register (SAR) analog‐to‐digital converters (ADCs). During the sampling …
A doubled transistor latch common-mode insensitive rail-to-rail regenerative comparator for low supply voltage applications
H Pahlavanzadeh, MA Karami - AEU-International Journal of Electronics …, 2023 - Elsevier
This paper presents a high-speed common-mode insensitive two-stage regenerative
comparator designed for low supply voltage applications. The proposed comparator features …
comparator designed for low supply voltage applications. The proposed comparator features …
A common-mode insensitive thyristor-based latch regenerative comparator for low supply voltage applications
H Pahlavanzadeh, R Navabi, S Iesakhani - Microelectronics Journal, 2024 - Elsevier
Presented in this article is a new two-stage rail-to-rail regenerative comparator circuit
designed for low supply voltage applications. This work introduces a thyristor-based latch for …
designed for low supply voltage applications. This work introduces a thyristor-based latch for …