Low-power SAR ADC design: Overview and survey of state-of-the-art techniques
This paper presents an overview for low-power successive approximation register (SAR)
analog-to-digital converters (ADCs). It covers the operation principle, error analysis, and …
analog-to-digital converters (ADCs). It covers the operation principle, error analysis, and …
Very low-voltage digital-audio/spl Delta//spl Sigma/modulator with 88-dB dynamic range using local switch bootstrapping
M Dessouky, A Kaiser - IEEE Journal of Solid-State Circuits, 2001 - ieeexplore.ieee.org
A 1-V 1-mW 14-bit/spl Delta//spl Sigma/modulator in a standard CMOS 0.35-/spl mu/m
technology is presented. Special attention has been given to device reliability and power …
technology is presented. Special attention has been given to device reliability and power …
Analog-to-digital converter-based serial links: An overview
The ever-increasing number of networked devices and cloud computing applications has
created dramatic growth in data center traffic. This necessitates that the serial links that …
created dramatic growth in data center traffic. This necessitates that the serial links that …
A digitally enhanced 1.8-V 15-bit 40-MSample/s CMOS pipelined ADC
E Siragusa, I Galton - IEEE Journal of Solid-State Circuits, 2004 - ieeexplore.ieee.org
A 1.8-V 15-bit 40-MSample/s CMOS pipelined analog-to-digital converter with 90-dB
spurious-free dynamic range (SFDR) and 72-dB peak signal-to-noise ratio (SNR) over the …
spurious-free dynamic range (SFDR) and 72-dB peak signal-to-noise ratio (SNR) over the …
The bootstrapped switch [a circuit for all seasons]
B Razavi - IEEE Solid-State Circuits Magazine, 2015 - ieeexplore.ieee.org
Field-effect transistors (FETs) have been used as switches, particularly for analog signals,
since the 1950s. In the early days of analog sampling, it was discovered that such devices …
since the 1950s. In the early days of analog sampling, it was discovered that such devices …
A 10-bit 200-MS/s CMOS parallel pipeline A/D converter
L Sumanen, M Waltari… - IEEE Journal of Solid …, 2001 - ieeexplore.ieee.org
This paper describes a 10-bit 200-MS/s CMOS parallel pipeline analog-to-digital (A/D)
converter that can sample input frequencies above 200 MHz. The converter utilizes a front …
converter that can sample input frequencies above 200 MHz. The converter utilizes a front …
[图书][B] CMOS: front-end electronics for radiation sensors
A Rivetti - 2018 - books.google.com
CMOS: Front-End Electronics for Radiation Sensors offers a comprehensive introduction to
integrated front-end electronics for radiation detectors, focusing on devices that capture …
integrated front-end electronics for radiation detectors, focusing on devices that capture …
A zero-crossing-based 8-bit 200 MS/s pipelined ADC
L Brooks, HS Lee - IEEE Journal of Solid-State Circuits, 2007 - ieeexplore.ieee.org
Zero-crossing-based circuits (ZCBC) are introduced as a generalization of comparator-
based switched-capacitor circuits (CBSC). To demonstrate this concept, an 8-bit, 200 MS/s …
based switched-capacitor circuits (CBSC). To demonstrate this concept, an 8-bit, 200 MS/s …
[图书][B] Circuit techniques for low-voltage and high-speed A/D converters
ME Waltari, KAI Halonen - 2002 - books.google.com
For four decades the evolution of integrated circuits has followed Moore's law, according to
which the number of transistors per square millimeter of silicon doubles every 18 months. At …
which the number of transistors per square millimeter of silicon doubles every 18 months. At …
A 5-GS/s 7.2-ENOB time-interleaved VCO-based ADC achieving 30.5 fJ/cs
M Baert, W Dehaene - IEEE Journal of Solid-State Circuits, 2019 - ieeexplore.ieee.org
This article presents an eight-channel time-interleaved voltage-controlled oscillator (VCO)-
based analog-to-digital converter (ADC), achieving 7.2 effective number of bits (ENOBs) at 5 …
based analog-to-digital converter (ADC), achieving 7.2 effective number of bits (ENOBs) at 5 …