A 44-W, 91.3-dB SNDR DT Modulator With Second-Order Noise-Shaping SAR Quantizer

L Wang, S Liu, Y Zhang, L Zhong… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
This article presents a single-loop third-order discrete-time delta-sigma modulator (DTDSM)
with a 4-bit second-order noise shaping successive approximation register (NS SAR) …

A wide dynamic range multi-mode band-pass continuous-time delta–sigma modulator employing single-opamp resonator with positive resistor-feedback

S Kim, J Rhee, S Kim - … Transactions on Circuits and Systems II …, 2019 - ieeexplore.ieee.org
In this brief, we present a wide dynamic range (DR) multi-mode band-pass continuous-time
delta–sigma modulator (BP-CTDSM) employing a single-opamp resonator with positive …

A 70MHz Bandwidth Time-Interleaved Noise-Shaping SAR Assisted Delta Sigma ADC with Digital Cross-Coupling in 28nm CMOS

LM Santana, E Martens, J Lagos… - IEEE Open Journal …, 2024 - ieeexplore.ieee.org
This work presents a 2x Time-Interleaved (TI) Delta Sigma Modulator (DSM) Analog-to-
Digital Converter (ADC) leveraging a 6b Noise-Coupled (NC) Noise-Shaping (NS) SAR …

Self-dithering technique for high-resolution SAR ADC design

L He, L Jin, J Yang, F Lin, L Yao… - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
In this brief, a high-resolution successive-approximation-register analog-to-digital-
conversion architecture for biomedical data acquisition is proposed. A filtered least …

A multibit delta–sigma modulator with double noise-shaped segmentation

L He, G Zhu, F Long, Y Zhang, L Wang… - … on Circuits and …, 2014 - ieeexplore.ieee.org
This brief proposes a low-power architecture for a discrete-time (DT) delta-sigma modulator
to take full advantages of increased quantization levels. In the proposed architecture, noise …

Delay Error Shaping in ΔΣ Modulators Using Time-Interleaved High Resolution Quantizers

M Pietzko, J Ungethüm, JG Kauffman… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
As wideband Delta-Sigma-Modulators (DSMs) are restricted in oversampling ratio (OSR),
and low OSR reduces the benefit of higher order loop filters, the increase of the internal …

A differential quantizer-based error feedback modulator for analog-to-digital converters

AVJ Prakash, BR Jose, J Mathew… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
A differential quantizer-based error feedback modulator intended for digitizing analog
signals and its comparison to the traditional interpolative sigma delta analog-to-digital …

High accuracy frequency extraction based on sigma-delta ADC applied in resonant dew point sensor

J Tian, X Meng, J Nie, N Li - Measurement, 2018 - Elsevier
One of the design challenges for the resonant dew point measurement was optimizing the
rapidity and accuracy of frequency extraction to meet the requirements. We have developed …

A 2-MHz BW 82-dB DR continuous-time delta–sigma modulator with a capacitor-based voltage DAC for ELD compensation

S Kim, SI Na, Y Yang, S Kim - IEEE Transactions on Very Large …, 2018 - ieeexplore.ieee.org
In this paper, we present a third-order nine-level continuous-time delta–sigma modulator, in
which a capacitor-based voltage digital-to-analog converter is used to compensate for …

Digital noise coupled mash delta-sigma modulator

A Rezapour, H Shamsi - … on Circuits and Systems II: Express …, 2018 - ieeexplore.ieee.org
This brief proposes digital noise coupling technique for multistage noise shaping Delta-
Sigma modulator. In the proposed technique, the digital output of the second stage is fed to …