An efficient hardware architecture of the A-star algorithm for the shortest path search engine

WJ Seo, SH Ok, JH Ahn, S Kang… - 2009 Fifth International …, 2009 - ieeexplore.ieee.org
There are several shortest-path search algorithms such as A-star, D-star and Dijkstra. These
algorithms are widely used in automotive vehicles and mobile navigation systems. As the …

FPGA Implementation of A  Algorithm for Real‐Time Path Planning

Y Zhou, X Jin, T Wang - International Journal of Reconfigurable …, 2020 - Wiley Online Library
The traditional A∗ algorithm is time‐consuming due to a large number of iteration operations
to calculate the evaluation function and sort the OPEN list. To achieve real‐time path …

Analysis and Construction of Hardware Accelerators for Calculating the Shortest Path in Real-Time Robot Route Planning

LTC Esteves, WLA Oliveira, PCMA Farias - Electronics, 2024 - mdpi.com
This study introduces an optimization approach for calculating the shortest path in mobile
robot route planning. The proposed solution targets real-time processing requirements by …

[PDF][PDF] Evaluation of an FPGA-based shortest-path-search accelerator

Y Takei, M Hariyama, M Kameyama - Proceedings of the …, 2015 - ecei.tohoku.ac.jp
Shortest-path search over large scale graphs is widely used in various applications.
However, shortest path algorithms such as Dijkstra's algorithm include complex processing …

A Comprehensive System Architecture using Field Programmable Gate Arrays Technology, Dijkstra's Algorithm, and Edge Computing for Emergency Response in …

MAA Assoul, AM Tahir, T Mahmoud… - arXiv preprint arXiv …, 2024 - arxiv.org
Efficient emergency response systems are crucial for smart cities. But their implementation is
highly challenging, particularly in regions like Chad where infrastructural constraints are …

[PDF][PDF] A new hardware architecture for parallel shortest path searching processor based-on FPGA technology

JM Abdul-Jabbar, MA Alwan… - Int. J. Electron. Comput …, 2012 - researchgate.net
In this paper, a new FPGA-based parallel processor for shortest path searching for OSPF
networks is designed and implemented. The processor design is based on parallel …

[PDF][PDF] An SIMD architecture for shortest-path search and its FPGA Implementation

Y Takei, M Hariyama, M Kameyama - Proceedings of the …, 2014 - ecei.tohoku.ac.jp
Shortest-path search over graphs plays an important role in various applications. However,
shortest path algorithms such as the Dijkstra's algorithm include complex processings. It is …

Rapid geodesic mapping of brain functional connectivity: Implementation of a dedicated co-processor in a field-programmable gate array (FPGA) and application to …

L Minati, M Cercignani, D Chan - Medical Engineering & Physics, 2013 - Elsevier
Graph theory-based analyses of brain network topology can be used to model the
spatiotemporal correlations in neural activity detected through fMRI, and such approaches …

Application of a novel discrete differential evolution algorithm to svrp

L Hou, Z Hou, H Zhou - 2012 Fifth International Joint …, 2012 - ieeexplore.ieee.org
In order to propose a novel discrete differential evolution algorithm for stochastic vehicle
routing problems (SVRP), the two bit wise operators of the computer language are …

[PDF][PDF] Design and Implementation of A Novel FPGA-Based Pipelined-Parallel Processor Architecture for Shortest Path Search

JM Abdul-Jabbar, MA Alwan, MAA Al-Ebadi - researchgate.net
In this paper, a pipelined-parallel hardware architecture to compute the shortest paths of
OSPF networks is proposed based on parallel shortest path searching algorithm. OSPF …