Systems-on-Chip's (SoC) design complexity demands a high-performance linear regulator
architecture to maintain a stable operation for the efficient power management of today's …

This article presents a synthesizable digital low-dropout regulator (DLDO) that precludes the
use of an output load capacitor. For efficient regulation, the DLDO consists of fine and …

This article presents a four-phase time-based switched-capacitor low-dropout (SCLDO)
regulator that regulates an output load voltage () of 0.35–0.95 V with an input voltage () of …

Digital integrated circuits have significantly benefited from technology scaling down, while
conventional analog integrated circuits suffer from more design constraints. In recent years …

This article proposes a fully integrated hybrid low-dropout regulator (HLDO) that features an
ultralow dropout and a highly improved transient response. This HLDO incorporates a …

In this paper, a power regulated circuit (PRC) is proposed for system-on-a-chip (SoC)
applications. The proposed PRC is composed of a limiter, a bandgap reference (BGR), three …

This letter presents a fully integrated analog-assisted (AA) digital low-dropout regulator
(DLDO) to operate at low input voltage (V IN) with fast transient response. A negative voltage …

In this article, a digital LDO with a feedforward controller and weight redistribution algorithm
(WRA) for line regulation improvement is proposed. The proposed digital low dropout …

This article presents an external-clock-free fully synthesizable digital low-dropout regulator
(DLDO) without an output capacitor. To lower quiescent current in a steady state, time-based …

This article introduces a novel low-dropout (LDO) regulator based on a flipped-voltage
follower (FVF) design, achieving a rapid 4 ns settling time. Tailored for high bandwidth …