Dugdugi: An optimal fault addressing scheme for octagon-like on-chip communication networks

B Bhowmik - IEEE Transactions on Very Large Scale Integration …, 2021 - ieeexplore.ieee.org
Network-on-chip (NoC) has emerged as a scalable on-chip communication platform and,
hence, has become more popular. However, as the sole communication medium, a single …

RescueSNN: enabling reliable executions on spiking neural network accelerators under permanent faults

RVW Putra, MA Hanif, M Shafique - Frontiers in Neuroscience, 2023 - frontiersin.org
To maximize the performance and energy efficiency of Spiking Neural Network (SNN)
processing on resource-constrained embedded systems, specialized hardware …

Thinking and prospect of power chip specificity

F Ma, M Li, X Dong, B Wang, Y Zhou… - International Journal …, 2021 - Wiley Online Library
The contradiction between the demand of massive intelligent scene caused by the
interconnection of things in power system and the bottleneck of the chip itself is becoming …

TSV-OCT: A scalable online multiple-TSV defects localization for real-time 3-D-IC systems

KN Dang, AB Ahmed, AB Abdallah… - IEEE Transactions on …, 2019 - ieeexplore.ieee.org
In order to detect and localize through-silicon-via (TSV) failures in both manufacturing and
operating phases, most of the existing methods use a dedicated testing mechanism with …

A survey on network on chip routing algorithms criteria

M Kaleem, IFB Isnin - Advances on Smart and Soft Computing …, 2021 - Springer
As number of components on the semi-conductor industry is growing at a healthy rate,
results in an increase in number of cores integrating on a chip.. Demand for core …

Detection and Localization of Channel-Short Faults in Regular On-Chip Interconnection Networks

B Bhowmik - SN Computer Science, 2023 - Springer
With the rapid developments in VLSI technology, the communication channels in networks-
on-chip (NoCs) can place many wires for sustaining high-performance requirements over …

NoCGuard: A reliable network-on-chip router architecture

MA Shafique, NK Baloch, MI Baig, F Hussain, YB Zikria… - Electronics, 2020 - mdpi.com
Aggressive scaling in deep nanometer technology enables chip multiprocessor design
facilitated by the communication-centric architecture provided by Network-on-Chip (NoC). At …

Sixer: A low-overhead, fully-distributed test scheme with guaranteed delivery of packets in networks-on-chip

B Bhowmik - Microelectronics Reliability, 2023 - Elsevier
The guaranteed delivery of application packets from source to destination in a network-on-
chip (NoC) is increasingly becoming an essential design issue. Channel faults may cause a …

Improving reliability in spidergon network on chip-microprocessors

B Bhowmik, JK Deka, S Biswas - 2020 IEEE 63rd International …, 2020 - ieeexplore.ieee.org
Aggressive technology scaling continues to make networks-on-chip (NoCs) vulnerable to
failures that relentlessly result in reliability concerns and unexpected system performance …

TRACK: An algorithm for fault-tolerant, dynamic and scalable 2D mesh network-on-chip routing reconfiguration

A Jain, V Laxmi, M Tripathi, MS Gaur, R Bishnoi - Integration, 2020 - Elsevier
Abstract Network-on-chip (NoC) is a reliable and scalable on-chip interconnect solution
particularly used for MPSoCs and CMPs. Increasing susceptibility of NoC to failures is …