In-place memory mapping approach for optimized parallel hardware interleaver architectures
SU Reehman, C Chavet, P Coussy… - … Design, Automation & …, 2015 - ieeexplore.ieee.org
Due to their impressive error correction performances, turbo-codes or LDPC architectures
are now widely used in communication systems and are one of the most critical parts of …
are now widely used in communication systems and are one of the most critical parts of …
A conflict-free memory mapping approach to design parallel hardware interleaver architectures with optimized network and controller
A Briki, C Chavet, P Coussy - SiPS 2013 Proceedings, 2013 - ieeexplore.ieee.org
Recent communication standards and storage systems (eg wireless access, digital video
broadcasting or magnetic storage in hard disk drives) uses error correcting codes such as …
broadcasting or magnetic storage in hard disk drives) uses error correcting codes such as …
A memory mapping approach based on network customization to design conflict-free parallel hardware architectures
S Ur Reehman, C Chavet, P Coussy - Proceedings of the 24th Edition of …, 2014 - dl.acm.org
Parallel hardware architectures are needed to achieve high throughput systems.
Unfortunately, efficient parallel architectures often require removing memory access …
Unfortunately, efficient parallel architectures often require removing memory access …
Towards higher speed decoding of convolutional turbocodes
ODS Gonzalez - 2013 - theses.hal.science
The turbo codes are a well known channel coding technique widely used because of their
outstanding error decoding performance close to the Shannon limit. These codes were …
outstanding error decoding performance close to the Shannon limit. These codes were …
[PDF][PDF] 基于内存地址映射的并行交织器的改进算法
徐可， 茹国宝， 甘良才 - 科学技术与工程, 2015 - stae.com.cn
摘# 要# 为了使具有高吞吐量特性的并行0Z9S2 码译码得到应用, 提出了并行无冲突交织器的
数学模型, 并由它得到一种改进的内存地址映射(QOO) 方案, 此方案能快捷高效地将传统的交织 …
数学模型, 并由它得到一种改进的内存地址映射(QOO) 方案, 此方案能快捷高效地将传统的交织 …
Designing Optimized parallel interleaver architecture for Turbo and LDPC decoders
SU Rehman - 2014 - theses.hal.science
Turbo and LDPC codes are two families of codes that are extensively used in current
communication standards due to their excellent error correction capabilities. To achieve high …
communication standards due to their excellent error correction capabilities. To achieve high …
Conception d'architectures d'entrelaceurs parallèles pour les décodeurs de Turbo-Codes et de LDPC
SU Reehman - 2014 - inria.hal.science
Les codes correcteurs d'erreurs sont largement utilisés dans des domaines allant de
l'automobile aux communications sans fils. La complexité croissante des algorithmes …
l'automobile aux communications sans fils. La complexité croissante des algorithmes …
[PDF][PDF] Placement de données en mémoire sans conflit pour l'optimisation du réseau d'interconnexion et du contrôleur des entrelaceurs parallèles
B AROUA, C CYRILLE, C PHILIPPE, M ERIC - 2013 - gretsi.fr
Originalité–Nous proposons (1) un modèle formel matricielles permettant de représenter les
séquences d'accès aux données,(2) un modèle formel basé sur des graphes de conflits …
séquences d'accès aux données,(2) un modèle formel basé sur des graphes de conflits …