Approximate computing is an emerging trend in digital design that trades off the requirement
of exact computation for improved speed and power performance. This paper proposes …

This paper presents a design methodology for high-speed Booth encoded parallel multiplier.
For partial product generation, we propose a new modified Booth encoding (MBE) scheme …

This study has developed three Logistic Regression Models to determine and analyze the
factors that could affect knowledge, attitude and behavior of the urban poor concerning solid …

We present a high-performance low-power design of linear array multipliers based on a
combination of the following techniques: signal flow optimization in [3: 2] adder array for …

This paper presents a novel split-radix fast Fourier transform (SRFFT) pipeline architecture
design. A mapping methodology has been developed to obtain regular and modular …

The performance of multiplication is crucial for multimedia applications such as 3D graphics
and signal processing systems, which depend on the execution of large numbers of …

The power consumption of integrated circuits is one of the most problematic considerations
affecting the design of high-performance chips and portable devices. The study of power …

Truncated multipliers compute the n most-significant bits of the n*n bits product. This paper
focuses on variable-correction truncated multipliers, where some partial-products are …

This paper focuses on fixed-width multipliers with linear compensation function by
investigating in detail the effect of coefficients quantization. New fixed-width multiplier …

Booth encoding is believed to yield faster multiplier designs with higher energy
consumption. 16x16-bit Booth and Non-Booth multipliers are analyzed in energy and delay …