The device behavior of a stacked ferroelectric heterojunction tunnel field effect transistor (Fe-
HTFET) on a buried oxide substrate is investigated in this paper. Si-doped HfO 2 was taken …

This work explores the temperature associated reliability issues of selective buried oxide
(SELBOX) TFET. The proposed device is optimized for maximum ION/IOFF ratio considering …

This article reports an architecture of a silicon-on-insulator (SOI) tunnel field effect transistor
(TFET) possessing an npn body, where the two pn junctions serve as the primary tunneling …

In this paper, we propose and develop an analytical model of a Triple material double gate
Tunnel Field Effect Transistor (TM-DG TFET) with hetero-dielectric gate oxide stack …

This work analyses the reliability issues of vertically extended drain double gate Si 1− x Ge x
source tunnel FET on the basis of temperature effect and interface charge effects. The …

In this Article, the effects of lateral straggle parameter variation and Temperature variation
have been investigated on Hetero Junction Dual Gate Vertical TFET. Although the TFET is a …

A compact analytical drain current model considering the inversion layer and source
depletion is developed for the gate-all-around (GAA) heterojunction tunneling FET (H-TFET) …

In this paper, optically gated Tunnel Field Effect Transistor (TFET), operating on the principle
of band-to-band tunneling, is designed for sensing closely spaced spectral wavelengths …

A compact model for the drain current of a double-gate tunnel field-effect transistor (TFET)
operating in the subthreshold and super-threshold regions is proposed in this paper. Using …

In this paper, we examine the impact of variation in the lateral straggle parameter on linearity
and reliability performance for the Hetero-stacked TFET. By incorporating hetero-stack in the …