Instruction compression in runtime for embedded systems

WRA Dias, R da Silva Barreto… - … de Alto Desempenho …, 2011 - proceedings-sol.sbc.org.br
The efficient use of embedded systems relies heavily on appropriate strategies to optimize
the execution time and power consumption. These systems are characterized by resource …

Architectural characterization and code compression in embedded processors

WRA Dias, ED Moreno… - IEEE Latin America …, 2012 - ieeexplore.ieee.org
This paper presents an architectural analysis of three processors RISC of 32 bits such as:
ARM, PowerPC and XScale, used very in embedded systems. Simulation with the …

Cache performance analysis of SHA-3 hashing algorithm (BLAKE) and SHA-1

FMR Junior, ED Moreno, WRA Dias… - … En Informatica (CLEI …, 2012 - ieeexplore.ieee.org
Parameters of cache performance may improve or worsen the performance of the all
processing and of cache memory itself. Through simulation techniques using the …

[引用][C] ANALYSIS OF BLAKE ALGORITHM FOR CACHE PERFORMANCE

O Harshavardhan, CS Kumar