A review on security implementations in soft-processors for IoT applications

MA Caraveo-Cacep, R Vázquez-Medina… - Computers & Security, 2024 - Elsevier
With the increase in the number of devices connected to the Internet, the need to maintain
and harden information security in Internet systems has significantly increased. This has led …

Secure hash algorithms and the corresponding FPGA optimization techniques

ZA Al-Odat, M Ali, A Abbas, SU Khan - ACM Computing Surveys (CSUR), 2020 - dl.acm.org
Cryptographic hash functions are widely used primitives with a purpose to ensure the
integrity of data. Hash functions are also utilized in conjunction with digital signatures to …

Resource-shared crypto-coprocessor of AES Enc/Dec with SHA-3

A Khalid, A Aziz, C Wang, M O'Neill… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
Cryptographic co-processors are integral to the modern System-on-Chips. Flexibility in such
designs serves dual purpose, ie, it enables acceleration of different essential cryptographic …

Ensuring the security and performance of IoT communication by improving encryption and decryption with the lightweight cipher uBlock

C Liu, Y Zhang, J Xu, J Zhao, S Xiang - IEEE Systems Journal, 2022 - ieeexplore.ieee.org
Internet of Things (IoT) devices expect a secure communication method or protocol with
communication performance that matches the network bandwidth in a public network. With …

Comparative study of Keccak SHA-3 implementations

A Dolmeta, M Martina, G Masera - Cryptography, 2023 - mdpi.com
This paper conducts an extensive comparative study of state-of-the-art solutions for
implementing the SHA-3 hash function. SHA-3, a pivotal component in modern …

A high-performance SIKE hardware accelerator

Z Ni, M O'Neill, W Liu - … on Very Large Scale Integration (VLSI …, 2022 - ieeexplore.ieee.org
Supersingular isogeny key encapsulation (SIKE) is a promising candidate in the NIST
postquantum cryptography (PQC) standardization process, which has the smallest key …

On efficiency enhancement of SHA-3 for FPGA-based multimodal biometric authentication

MM Sravani, SA Durai - IEEE Transactions on Very Large Scale …, 2022 - ieeexplore.ieee.org
Synchronized padder block and a compact-dynamic round constant (RC) generator to
achieve highly efficient Keccak architecture are proposed in this work. The proposed design …

[PDF][PDF] H-rotation: secure storage and retrieval of passphrases on the authentication process

H Touil, N El Akkad, K Satori - Int. J. Saf. Secur. Eng, 2020 - academia.edu
Accepted: 3 December 2020 Passwords/passphrases can be either system generated or
user-selected. A combination of both approaches is also possible—encryption created by …

An efficient OpenCL-Based implementation of a SHA-3 co-processor on an FPGA-centric platform

H Bensalem, Y Blaquière… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
This brief proposes and evaluates several OpenCL-based implementations of the Secure
Hash Algorithm-3 (SHA-3) co-processor. These implementations are developed based on …

Compact FPGA hardware architecture for public key encryption in embedded devices

L Rodríguez-Flores, M Morales-Sandoval, R Cumplido… - PloS one, 2018 - journals.plos.org
Security is a crucial requirement in the envisioned applications of the Internet of Things (IoT),
where most of the underlying computing platforms are embedded systems with reduced …