Digital low-dropout regulator with voltage-controlled oscillator based control
JG Kang, J Park, MG Jeong… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
A digital low-dropout (DLDO) regulator is described which is controlled by voltage-controlled
oscillator (VCO) based feedback loop. There are two VCOs in the control loop whose …
oscillator (VCO) based feedback loop. There are two VCOs in the control loop whose …
An output-capacitor-free synthesizable digital LDO using CMP-triggered oscillator and droop detector
This article presents a synthesizable digital low-dropout regulator (DLDO) that precludes the
use of an output load capacitor. For efficient regulation, the DLDO consists of fine and …
use of an output load capacitor. For efficient regulation, the DLDO consists of fine and …
Architectural advancement of digital low-dropout regulators
Digital Low-dropout (DLDO) regulators have been widely utilised for highly-efficient fine-
grained power delivery and management in system-on-chips (SoCs) due to their process …
grained power delivery and management in system-on-chips (SoCs) due to their process …
An output-capacitorless analog LDO featuring frequency compensation of four-stage amplifier
In this paper, we propose an output-capacitorless analog low-dropout voltage regulator
(ALDO) featuring frequency compensation of a four-stage amplifier consisting of a three …
(ALDO) featuring frequency compensation of a four-stage amplifier consisting of a three …
A 310-nA quiescent current 3-fs-FoM fully integrated capacitorless time-domain LDO with event-driven charge pump and feedforward transient enhancement
In this article, a fully integrated capacitorless low-dropout regulator (LDO) is presented for
Internet-of-Things (IoT) edge sensor application. To achieve sub-1-V operation and fast …
Internet-of-Things (IoT) edge sensor application. To achieve sub-1-V operation and fast …
Review, survey, and benchmark of recent digital LDO voltage regulators
This paper presents a review of the recent digital low-dropout voltage regulators (DLDOs).
We have reviewed them in five aspects: control laws, triggering methods, power-FET circuit …
We have reviewed them in five aspects: control laws, triggering methods, power-FET circuit …
An all-standard-cell-based synthesizable SAR ADC with nonlinearity-compensated RDAC
Z Xu, N Ojima, S Li, T Iizuka - IEEE Transactions on Very Large …, 2021 - ieeexplore.ieee.org
We propose an all-standard-cell-based synthesizable successive-approximation-register
analog-to-digital converter (SAR ADC) which is automatically placed and routed (P&R) …
analog-to-digital converter (SAR ADC) which is automatically placed and routed (P&R) …
29.6 A Distributed Digital LDO with Time-Multiplexing Calibration Loop Achieving 40A/mm2 Current Density and 1mA-to-6.4A Ultra-Wide Load Range in 5nm FinFET …
Although the number of cores is increasing continuously in modern microprocessors for
applications such as HPC and AI, the available power is strictly limited by the thermal power …
applications such as HPC and AI, the available power is strictly limited by the thermal power …
Power delivery networks for embedded mobile SoCs: Architectural advancements and design challenges
Conventional power delivery networks (PDNs) and power management techniques using off-
chip power converters with bulky passive components cannot meet the ever-evolving power …
chip power converters with bulky passive components cannot meet the ever-evolving power …
An All-Digital, 1.92–7.32 mV/LSB, 0.5–2 GS/s Sample Rate, and 0-Latency Prediction Voltage Sensor With Dynamic PVT Calibration for Droop Detection and AVS …
The on-chip droop in processor may cause a severe voltage reduction resulting in a need for
high-speed and high-resolution on-chip voltage sensors. However, traditional voltage …
high-speed and high-resolution on-chip voltage sensors. However, traditional voltage …