FPGA architecture: Principles and progression

A Boutros, V Betz - IEEE Circuits and Systems Magazine, 2021 - ieeexplore.ieee.org
Since their inception more than thirty years ago, field-programmable gate arrays (FPGAs)
have been widely used to implement a myriad of applications from different domains. As a …

Field programmable gate array applications—A scientometric review

J Ruiz-Rosero, G Ramirez-Gonzalez, R Khanna - Computation, 2019 - mdpi.com
Field Programmable Gate Array (FPGA) is a general purpose programmable logic device
that can be configured by a customer after manufacturing to perform from a simple logic gate …

The Ultrasound Signal Processing Based on High-Performance CORDIC Algorithm and Radial Artery Imaging Implementation

C Zhang, X Geng, F Yao, L Liu, Z Guo, Y Zhang… - Applied Sciences, 2023 - mdpi.com
The radial artery reflects the largest amount of physiological and pathological information
about the human body. However, ultrasound signal processing involves a large number of …

[PDF][PDF] Area efficient fpga implementation of sobel edge detector for image processing applications

R Mehra, R Verma - International Journal of Computer Applications, 2012 - Citeseer
In this Paper an efficient method of FPGA based design and implementation of area efficient
Sobel Edge detection filter is presented using a combination of hardware and software …

High speed low area OBC DA based decimation filter for hearing aids application

G NagaJyothi, S Sridevi - International Journal of Speech Technology, 2020 - Springer
This brief presents a decimation filter for hearing aid application using distributed arithmetic
(DA) approach. In this paper, we propose a reconfigurable offset-binary code (OBC) DA …

Distributed arithmetic for FIR filter design on FPGA

W Sen, T Bin, Z Jun - 2007 International Conference on …, 2007 - ieeexplore.ieee.org
This paper presents a distributed arithmetic (DA) for highly efficient multiplier-less FIR filter
designed on FPGA. First, the theory of the distributed arithmetic is described. Furthermore, a …

[PDF][PDF] Design and implementation of cost-effective simple FIR filter for EEG signal on FPGA

A Mahabub - World Scientific News, 2019 - bibliotekanauki.pl
Filter is immensely used to distinguish distinctive human signal progressively. In this article,
a digital finite impulse response (FIR) filter is presented for the quick detection of …

[PDF][PDF] FPGA-based design of high-speed CIC decimator for wireless applications

R Mehra, R Arora - power, 2011 - Citeseer
In this paper an efficient multiplier-less technique is presented to design and implement a
high speed CIC decimator for wireless applications like SDR and GSM. The Cascaded …

Design and implementation of cost-effective IIR filter for EEG signal on FPGA

A Mahabub - Australian Journal of Electrical and Electronics …, 2020 - Taylor & Francis
Filter is unfathomably used to identify diverse human flag in genuine time. In this paper, a
digital IIR filter is proposed for the fast detection of EEG signal to smooth and compress the …

FPGA implementation of fast running FIR filters

S Rengaprakash, M Vignesh, NS Anwar… - 2017 International …, 2017 - ieeexplore.ieee.org
Digital filter design using Finite Impulse Response (FIR) filters are predominantly used for
various applications pertaining to digital signal processing and wireless communication …