Recent progress on sensitivity analysis of schottky field effect transistor based biosensors

P Kumar, P Esakki, L Agarwal, PeddaKrishna, S Kale… - Silicon, 2023 - Springer
In this review, we explored the modern development of schottky field effect transistor (SK
FET) structures and the improvement of sensitivity of nanowire sensors using dielectric …

Recent study on Schottky tunnel field effect transistor for biosensing applications

P Anusuya, P Kumar, P Esakki, L Agarwal - Silicon, 2022 - Springer
In this review, we discussed highly sensitive biosensor devices which is having a more
attractive, wide scope and development in the sensing field. Biosensor devices can detect …

Junctionless gate-all-around nanowire FET with asymmetric spacer for continued scaling

VB Sreenivasulu, V Narendar - Silicon, 2021 - Springer
In this paper, we have performed the scaling of asymmetric junctionless (JL) SOI nanowire
(NW) FET at 10 nm gate length (LG). To study the device electrical performance various DC …

Dual metal gate dielectric engineered dopant segregated Schottky barrier MOSFET with reduction in Ambipolar current

S Kale, MS Chandu - Silicon, 2022 - Springer
In this paper, to solve the problem of higher ambipolar leakage current (I ambipolar) of
Dielectric Engineered (DE) Dopant Segregated (DG) Schottky Barrier (SB) MOSFET (DE DS …

Design and Investigation of the DM-PC-TFET-Based Biosensor for Breast Cancer Cell Detection

MK Bind, SV Singh, K Kumar Nigam - Transactions on Electrical and …, 2023 - Springer
In this paper, a dielectric modulated polarity control tunnel field-effect transistor (DM-PC-
TFET)-based biosensor has been proposed for the first time for breast cancer cells (BCCs) …

Impact of work function engineering in charge plasma based bipolar devices

L Bramhane, S Salankar, M Gaikwad, M Panchore - Silicon, 2022 - Springer
In this paper, we have explored and justified the reason behind the degradation in the cutoff
frequency of the bipolar transistors evolved from the charge plasma concept. It has been …

Ultracompact and low-power logic circuits via workfunction engineering

TF Canan, S Kaya, A Karanth… - IEEE Journal on …, 2019 - ieeexplore.ieee.org
An extensive analysis of sub-10-nm logic building blocks utilizing ultracompact logic gates
based on recently proposed gate workfunction engineering (WFE) approach is provided …

Analysis of interface trap charges on RF/analog performances of dual-gate-source-drain Schottky FET for high-frequency applications

P Anusuya, P Kumar - Multiscale and Multidisciplinary Modeling …, 2024 - Springer
This article mainly focuses on the impact on interface trap charges (ITCs) on dual gate
source-drain Schottky barrier tunnel field effect transistor (DGSD-STFET) using a high-k …

Heterogenous Gate Dielectric DLTFET: Reliability Perspective Against Degradation Mechanisms

K Cecil, M Panchore, DP Samajdar - Transactions on Electrical and …, 2022 - Springer
Heterogeneous gate dielectric (HD) dopingless n-type tunnel-FET (HD-DLTFET) is
proposed with improved reliability performance against distinct drain current degradation …

A Two Dimensional Analytical Model of Heterostructure Double Gate with Pocket Doped Tunnel FET

K Dharavath, A Vinod - Silicon, 2020 - Springer
This study presents a 2-D analytical surface potential model is advanced by derived the
expression from the 2-D Poisson's equation of heterostructure double gate tunnel FET with …