Exploiting expendable process-margins in DRAMs for run-time performance optimization

K Chandrasekar, S Goossens, C Weis… - … , Automation & Test …, 2014 - ieeexplore.ieee.org
Manufacturing-time process (P) variations and runtime voltage (V) and temperature (T)
variations can affect a DRAM's performance severely. To counter these effects, DRAM …

A deep-submicron CMOS flow for general-purpose timing-detection insertion

A Dixius, D Walter, S Höppner… - … Mixed Design of …, 2015 - ieeexplore.ieee.org
This paper introduces a design independent extension to RTL-to-GDS design-flows for
seamless insertion of timing-detection flip-flops at critical paths of a digital CMOS standard …

Variations in Device Characteristics

H Onodera, Y Miura, Y Sato, S Kajihara, T Sato… - VLSI Design and Test for …, 2019 - Springer
Ever increasing variability in device characteristics is a major threat to the dependability,
since it could give rise to faults and failures in VLSI circuits and systems. The variability …