FPGA PUF using programmable delay lines

M Majzoobi, F Koushanfar… - 2010 IEEE international …, 2010 - ieeexplore.ieee.org
This paper proposes a novel approach for efficient implementation of a real-valued arbiter-
based physical unclon-able function (PUF) on FPGA. We introduce a high resolution …

Efficient power and timing side channels for physical unclonable functions

U Rührmair, X Xu, J Sölter, A Mahmoud… - … and Embedded Systems …, 2014 - Springer
One part of the original PUF promise was their improved resilience against physical attack
methods, such as cloning, invasive techniques, and arguably also side channels. In recent …

FPGA-based true random number generation using circuit metastability with adaptive feedback control

M Majzoobi, F Koushanfar, S Devadas - Cryptographic Hardware and …, 2011 - Springer
The paper presents a novel and efficient method to generate true random numbers on
FPGAs by inducing metastability in bi-stable circuit elements, eg flip-flops. Metastability is …

Time-bounded authentication of FPGAs

M Majzoobi, F Koushanfar - IEEE Transactions on Information …, 2011 - ieeexplore.ieee.org
This paper introduces a novel technique to authenticate and identify field-programmable
gate arrays (FPGAs). The technique uses the reconfigurability feature of FPGAs to perform …

PAC learning of arbiter PUFs

F Ganji, S Tajik, JP Seifert - Journal of Cryptographic Engineering, 2016 - Springer
The general concept of physically unclonable functions (PUFs) has been nowadays widely
accepted and adopted to meet the requirements of secure identification and key …

[图书][B] On the learnability of physically unclonable functions

F Ganji - 2018 - Springer
Unfortunately, none of the candidate [PUF] constructions have a proof of computational
security, and further, most, if not all, of them have been shown to be susceptible to ML …

Automated design, implementation, and evaluation of arbiter-based PUF on FPGA using programmable delay lines

M Majzoobi, A Kharaya, F Koushanfar… - Cryptology ePrint …, 2014 - eprint.iacr.org
This paper proposes a novel approach for automated implementation of an arbiter-based
physical unclonable function (PUF) on field programmable gate arrays (FPGAs). We …

A Fourier analysis based attack against physically unclonable functions

F Ganji, S Tajik, JP Seifert - … , FC 2018, Nieuwpoort, Curaçao, February 26 …, 2018 - Springer
Electronic payment systems have leveraged the advantages offered by the RFID technology,
whose security is promised to be improved by applying the notion of Physically Unclonable …

Provably complete hardware trojan detection using test point insertion

S Wei, K Li, F Koushanfar, M Potkonjak - Proceedings of the International …, 2012 - dl.acm.org
This paper proposes a novel minimal test point insertion methodology that provisions a
provably complete detection of hardware Trojans by noninvasive timing characterization …

GROK-LAB: Generating real on-chip knowledge for intra-cluster delays using timing extraction

B Gojman, S Nalmela, N Mehta, N Howarth… - ACM Transactions on …, 2014 - dl.acm.org
Timing Extraction identifies the delay of fine-grained components within an FPGA. From
these computed delays, the delay of any path can be calculated. Moreover, a comparison of …