A survey of fpga-based robotic computing
Recent researches on robotics have shown significant improvement, spanning from
algorithms, mechanics to hardware architectures. Robotics, including manipulators, legged …
algorithms, mechanics to hardware architectures. Robotics, including manipulators, legged …
Non-relational databases on FPGAs: Survey, design decisions, challenges
Non-relational database systems (NRDS) such as graph and key-value have gained
attention in various trending business and analytical application domains. However, while …
attention in various trending business and analytical application domains. However, while …
Graph processing on fpgas: Taxonomy, survey, challenges
Graph processing has become an important part of various areas, such as machine
learning, computational sciences, medical applications, social network analysis, and many …
learning, computational sciences, medical applications, social network analysis, and many …
Accelerating SSSP for power-law graphs
The single-source shortest path (SSSP) problem is one of the most important and well-
studied graph problems widely used in many application domains, such as road navigation …
studied graph problems widely used in many application domains, such as road navigation …
A programmable architecture for robot motion planning acceleration
S Murray, W Floyd-Jones, G Konidaris… - 2019 IEEE 30th …, 2019 - ieeexplore.ieee.org
We have designed a programmable architecture to accelerate collision detection and graph
search, two of the principal components of robotic motion planning. The programmability …
search, two of the principal components of robotic motion planning. The programmability …
Blocked all-pairs shortest paths algorithm for hybrid CPU-GPU system
K Matsumoto, N Nakasato… - 2011 IEEE International …, 2011 - ieeexplore.ieee.org
This paper presents a blocked algorithm for the all-pairs shortest paths (APSP) problem for a
hybrid CPU-GPU system. In the blocked APSP algorithm, the amount of data communication …
hybrid CPU-GPU system. In the blocked APSP algorithm, the amount of data communication …
Automatic mapping of nested loops to FPGAs
U Bondhugula, J Ramanujam… - Proceedings of the 12th …, 2007 - dl.acm.org
This paper present a framework for automatic mapping of perfectly nested loops with
constant dependences onto regular processor arrays, suitable for direct implementation on …
constant dependences onto regular processor arrays, suitable for direct implementation on …
A Survey on Adaptive Computing in Robotics: Modelling, Methods and Applications
A Podlubne, D Göhringer - IEEE Access, 2023 - ieeexplore.ieee.org
Modern robots are complex heterogeneous systems composed of different Processing
Elements (PEs) with multiple sensors and actuators. This implies that different experts are …
Elements (PEs) with multiple sensors and actuators. This implies that different experts are …
A task parallel algorithm for finding all-pairs shortest paths using the GPU
T Okuyama, F Ino, K Hagihara - International Journal of …, 2012 - inderscienceonline.com
This paper proposes an acceleration method for finding the all-pairs shortest paths (APSPs)
using the graphics processing unit (GPU). Our method is based on Harish's iterative …
using the graphics processing unit (GPU). Our method is based on Harish's iterative …
A task parallel algorithm for computing the costs of all-pairs shortest paths on the cuda-compatible gpu
T Okuyama, F Ino, K Hagihara - 2008 IEEE International …, 2008 - ieeexplore.ieee.org
This paper proposes a fast method for computing the costs of all-pairs shortest paths
(APSPs) on the graphics processing unit (GPU). The proposed method is implemented …
(APSPs) on the graphics processing unit (GPU). The proposed method is implemented …