Heterogate junctionless tunnel field-effect transistor: future of low-power devices
Gate dielectric materials play a key role in device development and study for various
applications. We illustrate herein the impact of hetero (high-k/low-k) gate dielectric materials …
applications. We illustrate herein the impact of hetero (high-k/low-k) gate dielectric materials …
Impact of channel thickness on the performance of GaAs and GaSb DG-JLMOSFETs: an atomistic tight binding based evaluation
In this paper, the performance of GaAs and GaSb based sub-10 nm double-gate
junctionless metal-oxide-semiconductor field-effect transistors (DG-JLMOSFETs) have been …
junctionless metal-oxide-semiconductor field-effect transistors (DG-JLMOSFETs) have been …
[HTML][HTML] Impact on DC and analog/RF performances of SOI based GaN FinFET considering high-k gate oxide
This paper suggests an analysis of SOI-based GaN FinFET that considers high-k gate oxide
into account. The effect of using SOI substrate and a high-k dielectric layer on ON current …
into account. The effect of using SOI substrate and a high-k dielectric layer on ON current …
On the physical behavior of cryogenic IV and III–V Schottky barrier MOSFET devices
The physical influence of temperature down to the cryogenic regime is analyzed in a
comprehensive study and the comparison of IV and III-V Schottky barrier (SB) double-gate …
comprehensive study and the comparison of IV and III-V Schottky barrier (SB) double-gate …
Enhancing performance of dual-gate FinFET with high-K gate dielectric materials in 5 nm technology: a simulation study
The rapid advancement in nanoscale devices demands innovative gate dielectric materials
to replace traditional Silicon dioxide. This paper investigates the electrical behavior and …
to replace traditional Silicon dioxide. This paper investigates the electrical behavior and …
Compact modeling of cross-sectional scaling in gate-all-around FETs: 3-D to 1-D transition
We model the effects of cross-sectional radius scaling on–and–characteristics of gate-all-
around FETs (GAAFETs), capturing the continuous transition from a 3-D electron system to a …
around FETs (GAAFETs), capturing the continuous transition from a 3-D electron system to a …
A physics-based model of vertical TFET—Part II: Drain current model
A physics-based model for the tunneling current of vertical tunneling field transistors (TFET)
is proposed. In part I, the expression of is derived from the multi-branch general solutions of …
is proposed. In part I, the expression of is derived from the multi-branch general solutions of …
Mitigating DIBL and short-channel effects for III-V FinFETs with negative-capacitance effects
This paper, based on the IRDS 2022 technology node, investigates the DIBL and short-
channel effects for InGaAs negative-capacitance FinFETs (NC-FinFETs) through a …
channel effects for InGaAs negative-capacitance FinFETs (NC-FinFETs) through a …
Analysis and performance study of III–V Schottky barrier double-gate MOSFETs using a 2-D analytical model
A comprehensive study and comparison of IV and III-V Schottky barrier (SB) double-gate
MOSFETs using a universal analytical model and Synopsys TCAD Sentaurus is presented …
MOSFETs using a universal analytical model and Synopsys TCAD Sentaurus is presented …
Compact modeling of charge, capacitance, and drain current in III–V channel double gate FETs
In this paper, we present a surface potential based compact modeling of terminal charge,
terminal capacitance, and drain current for III-V channel double gate field-effect transistor …
terminal capacitance, and drain current for III-V channel double gate field-effect transistor …