The design of Multiple Valued Logic (MVL) digital circuits is performed by increasing the
representation domain from the two level (N= 2) switching algebra to N> 2 levels. Universal …

Algorithm of cubic computation and its VLSI implementation is described in this paper
through 'Vedic mathematics' formulae. An N-bit cubic implementation circuit was structured …

Functional circuits are a group of combinational logic circuits which may be utilized for
certain tasks and with specific planning. Decoders, multiplexers, and demultiplexers are all …

量子点细胞自动机(QCA) 等新技术已展现出一些深亚微米标准互补金属氧化物半导体无法提供
的显著特性. 用QCA 进行系统建模和设计多值逻辑门, 可使复杂逻辑电路设计更加便捷 …

" Vedic mathematics" is the ancient methodology of mathematics which has a unique
technique of calculations based on 16" sutras"(formulae). A Vedic squarer design (ASIC) …

The existence of computer arithmetic principles and performing different operations, like
addition, multiplication, division, squaring, cubing, extractions of square root, cube root, etc …

In this work, the implementation of the novel quaternary algebra over the larger quaternary
multiplexer and demuliplexer are performed. Both arbitrary multiplexer and demultiplexer …

To take advantage of the Multiple Valued Logic, with domain:{0, 1,..., N-1}, where N is the a
base of representation, set of integrated circuits (IC) that implement the MVL operators is …

The semiconductor market has been growing gradually over the long term, despite periodic
troughs and peaks, and it is projected that this trend will continue in the years to come. The …

Design of the binary logic circuits is restricted by the need of the interconnections.
Interconnections increase delay, area and energy consumption in CMOS digital circuits. A …