Design of high-performance carry select adder using multiplexer based logic in 90nm technology
KJ Wesly, S Rajesh, MR Rajeswaran… - 2023 4th …, 2023 - ieeexplore.ieee.org
To design a high-speed SqRt CSLA (Square Root Carry Select Look Ahead Adder) by using
Multiplexer logic in order to reduce the number of gates. Performance comparison of …
Multiplexer logic in order to reduce the number of gates. Performance comparison of …
Design of Low Power Pass Transistor Logic Based Adders for Multiplier in 90nm CMOS Process
The goal of this work is to design a half adder circuit for a multiplier with the considerations
of low power dissipation and area reduction under the supply voltage of 1V. The novelty that …
of low power dissipation and area reduction under the supply voltage of 1V. The novelty that …
Verification of UART using AHB VIP with Maximum Coverage
Universal Asynchronous Receiver Transmitter is a serial communication protocol that helps
in communicating data between devices. The verification of UART is important to eliminate …
in communicating data between devices. The verification of UART is important to eliminate …
[PDF][PDF] A Novel low power 2-D to 3-D Array Priority Encoder using Split-Logic technique for Data Path Applications
J Elizah, S Nithyasri - academia.edu
In this work, an ascendable low power 64-bit priority encoder is designed using a two-
directional array to three-directional array conversion, and Split-logic technique and 6-bit is …
directional array to three-directional array conversion, and Split-logic technique and 6-bit is …
[图书][B] Lead and associated heavy metal distribution in Ciudad Juaraz, Mexico
SE Grimida - 2013 - search.proquest.com
Concern over the extent and sources of heavy metals exposure has arisen worldwide since
their significant effects have been discovered in the environment. There is general …
their significant effects have been discovered in the environment. There is general …