Model order reduction (MOR) techniques reduce the complexity of VLSI designs, paving the
way to higher operating speeds and smaller feature sizes. This book presents a systematic …

This paper describes a block-latency insertion method (LIM) for the fast transient simulation
of the large networks with many coupling elements. First, the basic formulation of LIM is …

This paper presents fully parallel domain decomposition (DO) techniques for efficient
simulation of large-scale linear circuits such as power grids. DD techniques that use non …

This paper presents domain decomposition (DD) technique for efficient simulation of large-
scale linear circuits such as power distribution networks. Simulation results show that by …

This paper presents a robust partitioning-based model-order reduction (MOR) method,
PartMOR, suitable for reduction of very large RLC circuits or RLC-circuit parts of a non-RLC …

In this paper, we propose an efficient parallel dynamic linear solver, called GPU-GMRES, for
transient analysis of large power grid networks. The new method is based on the …

In this paper, we propose an efficient parallel dynamic linear solver, called GPU-GMRES, for
transient analysis of large linear dynamic systems such as large power grid networks. The …

This paper presents the design of a low noise CMOS Gilbert cell mixer in 180 nm technology
with the help of cadence tool. The switched biasing technique is used to improve the noise …

We propose a block-diagonal structured model order reduction (BDSM) scheme for fast
power grid analysis. Compared with existing power grid model order reduction (MOR) …

Model order reduction (MOR) techniques play a crucial role in the computer-aided design of
modern integrated circuits, where they are used to reduce the size of parasitic networks …