Modeling a copper/carbon nanotube composite for applications in electronic packaging
Y Feng, SL Burkett - Computational Materials Science, 2015 - Elsevier
A model is developed to determine the current density for a copper/carbon nanotube matrix
configured as through silicon vias, an appropriate structure for interconnect applications …
configured as through silicon vias, an appropriate structure for interconnect applications …
Carbon nanotube growth for through silicon via application
R Xie, C Zhang, MH Van der Veen, K Arstila… - …, 2013 - iopscience.iop.org
Through silicon via (TSV) technology is key for next generation three-dimensional integrated
circuits, and carbon nanotubes (CNT) provide a promising alternative to metal for filling the …
circuits, and carbon nanotubes (CNT) provide a promising alternative to metal for filling the …
Electrical–thermal characterization of through packaging vias in glass interposer
L Qian, Y Xia, G Shi, J Wang, Y Ye… - IEEE Transactions on …, 2017 - ieeexplore.ieee.org
Low-cost thin glass is developed as a promising material to advanced interposers for high
density electrical interconnection in 2.5-D and three-dimensional (3-D) integration. In this …
density electrical interconnection in 2.5-D and three-dimensional (3-D) integration. In this …
Study on transmission characteristics of carbon nanotube through silicon via interconnect
L Qian, Z Zhu, Y Xia - IEEE Microwave and Wireless …, 2014 - ieeexplore.ieee.org
In this letter, the Resistance Inductance Capacitance Conductance (RLCG) parameters of
carbon nanotube through silicon via (CNT-TSV) are modeled and a transmission line (TL) …
carbon nanotube through silicon via (CNT-TSV) are modeled and a transmission line (TL) …
Electrical modeling and characterization of copper/carbon nanotubes in tapered through silicon vias
M Rao - 2017 30th International Conference on VLSI Design …, 2017 - ieeexplore.ieee.org
The emergence of three dimensional (3D) interconnects has reduced wire floor planning
problems, increased device density, reduced RC wire delay, and minimized the energy …
problems, increased device density, reduced RC wire delay, and minimized the energy …
Study on crosstalk characteristic of carbon nanotube through silicon vias for three dimensional integration
L Qian, Y Xia, G Liang - Microelectronics Journal, 2015 - Elsevier
Coupling noise induced by through silicon vias (TSVs) is expected to be a major concern for
three dimensional integrated circuits (3-D ICs) system design. Using equivalent electrical …
three dimensional integrated circuits (3-D ICs) system design. Using equivalent electrical …
Electrical modeling of copper/carbon nanotubes for 3d integration
M Rao - 2016 IEEE 16th International Conference on …, 2016 - ieeexplore.ieee.org
A model of copper and carbon nanotube (CNT) composite filled in through silicon vias (TSV)
is developed to determine the electrical behavior of an emerging 3D interconnect …
is developed to determine the electrical behavior of an emerging 3D interconnect …
Vertical delay modeling of copper/carbon nanotube composites in a tapered through silicon via
M Rao - 2017 IEEE 67th Electronic Components and …, 2017 - ieeexplore.ieee.org
A model of copper and carbon nanotube (CNT) composite filled through silicon via (TSV) is
developed to estimate signal delay of a novel interconnect, employed in 3D integrated circuit …
developed to estimate signal delay of a novel interconnect, employed in 3D integrated circuit …
Electrical modeling of copper/multiwalled carbon nanotubes for 3d ic applications
M Rao - 2017 IEEE 17th International Conference on …, 2017 - ieeexplore.ieee.org
Three dimensional (3D) interconnect is a solution for designing today's Integrated Circuits
(ICs) in a view to achieve the ever growing consumer and market demands. The 3D …
(ICs) in a view to achieve the ever growing consumer and market demands. The 3D …
Interactive volume segmentation with the PAVLOV architecture
A Kaufman, K Kreeger - Parallel and Large-Data Visualization and …, 1999 - computer.org
A model of copper and carbon nanotube (CNT) composite filled through silicon via (TSV) is
developed to estimate signal delay of a novel interconnect, employed in 3D integrated circuit …
developed to estimate signal delay of a novel interconnect, employed in 3D integrated circuit …