In this work, single-event upset (SEU) responses of D flip-flop (FF) designs with different
threshold-voltage options in a 7-nm bulk FinFET technology are examined. Experimental …

Single-event (SE) performance of a variety of radiation-hardened by design (RHBD) flip-flop
(FF) circuits is evaluated at the 7-and 5-nm bulk FinFET nodes. For a given RHBD …

As Neural Processing Units (NPU) or accelerators are increasingly deployed in a variety of
applications including safety critical applications such as autonomous vehicle, and medical …

The radiation effects on a multi-nanosheet tunneling-based field effect transistor (NS-TFET)
were investigated for a 3-nm technology node using a three-dimensional (3D) technology …

This paper presents single-event upset (SEU) rates in flip-flops (FFs) in EUV 7 nm bulk-
FinFET technology. EUV technology achieves high transistor-density, small FF cell-size, and …

Thermal neutron induced soft-errors in 7nm bulk FinFET technology are characterized as a
function of supply voltage in this work. Results show that thermal neutron induced FIT rates …

Soft error rates are predicted for the 3-nm bulk FinFET technology node using layout-
informed Geant4 simulations and experimental data from the previous 7-nm and 5-nm bulk …

In this work, single-event upset responses of D flip-flop designs with different threshold-
voltage options in a 7-nm bulk FinFET technology are examined. Experimental data imply …

The reliability of the digital integrated circuits has been one of the most important topics, and
multiple studies have been carried out to increase the reliability of digital integrated circuits …