Artificial reality system with inter-processor communication (IPC)
J Wang, N Upasani, WS Powiertowski… - US Patent …, 2022 - Google Patents
The disclosure describes techniques for interrupt and inter-processor communication (IPC)
mechanisms that are shared among computer processors. For example, an artificial reality …
mechanisms that are shared among computer processors. For example, an artificial reality …
System on a chip (SoC) communications to prevent direct memory access (DMA) attacks
S Satpathy, WS Powiertowski, N Upasani… - US Patent …, 2022 - Google Patents
This disclosure describes system on a chip (SOC) commu nications that prevent direct
memory access (DMA) attacks. An example SoC includes an encryption engine and a …
memory access (DMA) attacks. An example SoC includes an encryption engine and a …
Artificial reality system with inter-processor communication (IPC)
GE Ehmann - US Patent 11,487,594, 2022 - Google Patents
The disclosure describes techniques for interrupt and inter-processor communication (IPC)
mechanisms that are shared among computer processors. For example, an artificial reality …
mechanisms that are shared among computer processors. For example, an artificial reality …
Presenting computer-generated content based on extremity tracking
BC Trzynadlowski, GPL Lutter, TG Salter… - US Patent …, 2023 - Google Patents
A method is performed at an electronic device including one or more processors, a non-
transitory memory, and a first input device. The method includes detecting, via the first input …
transitory memory, and a first input device. The method includes detecting, via the first input …
System on a chip (SOC) communications to prevent direct memory access (DMA) attacks
S Satpathy, WS Powiertowski, N Upasani… - US Patent …, 2023 - Google Patents
This disclosure describes system on a chip (SOC) communications that prevent direct
memory access (DMA) attacks. An example SoC includes an encryption engine and a …
memory access (DMA) attacks. An example SoC includes an encryption engine and a …
SRAM power switching with reduced leakage, noise rejection, and supply fault tolerance
P Caragiulo, DH Morris - US Patent 12,080,371, 2024 - Google Patents
Described are techniques for generating a supply voltage for an SRAM array using power
switching logic. The power switching logic can generate the supply voltage using a first …
switching logic. The power switching logic can generate the supply voltage using a first …
Artificial reality system having multi-bank, multi-port distributed shared memory
AK Mathur, E Salemi, DE Wingard… - US Patent 11,868,281, 2024 - Google Patents
This disclosure describes various examples of a system which uses a multi-bank, multi-port
shared memory system that may be implemented as part of a system on a chip. The shared …
shared memory system that may be implemented as part of a system on a chip. The shared …
Artificial reality system with reduced SRAM power leakage
DH Morris, AK Mathur - US Patent 11,670,364, 2023 - Google Patents
(57) ABSTRACT System on a Chip (SoC) integrated circuits are configured to reduce Static
Random-Access Memory (SRAM) power leakage. For example, SoCs configured to reduce …
Random-Access Memory (SRAM) power leakage. For example, SoCs configured to reduce …
Signaling of scene description for multimedia conferencing
I Bouazizi, NK Leung, T Stockhammer - US Patent 11,916,980, 2024 - Google Patents
Various embodiments include systems and methods for providing an immersive three-
dimensional group session. Various embodiments include methods and devices for …
dimensional group session. Various embodiments include methods and devices for …
Signaling of scene description for multimedia conferencing
I Bouazizi, NK Leung, T Stockhammer - US Patent 11,444,988, 2022 - Google Patents
Various embodiments include systems and methods for providing an immersive three-
dimensional group session. Various embodiments include methods and devices for …
dimensional group session. Various embodiments include methods and devices for …