A Comprehensive Survey and Comparison on Pipelined RISC System Architectures

A Samanta, S Goswami, K Pal… - Journal of Electrical …, 2024 - search.proquest.com
In the modern world, processors are crucial when multiple components are housed on a
single chip. Here, technology is developing quickly, and as a result, a variety of risks related …

A Novel Approach to Design and Verification of a Pipelined Microprocessor with Hazard Detection and Stall Insertion

M Solaiman, GM Solaiman - … Conference on I-SMAC (IoT in …, 2024 - ieeexplore.ieee.org
Since their conception in the early 1970s, microprocessors have been put to a multitude of
uses through various different designs. While there are many academic papers on the …

Design and Implementation of Pipelined MIPS Processor with Nested Vectored Interrupt Controller (NVIC)

T Hande, YM Vaidya, SP Metkar - 2024 15th International …, 2024 - ieeexplore.ieee.org
MIPS (abbr. Microprocessor without Interlocked Pipelined Stages) based Pipelined
Processor is a RISC (Reduced Instruction Set Computer) Processor [1][2]. The Processor is …

UVM Methodology for ARINC 429 Transceiver in Loop Back Mode

R Madhura, KH Krishnappa… - … on Mobile Networks …, 2023 - ieeexplore.ieee.org
Verification plays vital role in chip design and takes up more than 70% of the time. Thus,
building a reliable and reusable verification environment is necessary. UVM, or universal …