OPTI-Sim: Performing Optical Probing Simulation on Layout Design Files
Recent studies have revealed that laser-based Side-Channel Analysis (SCA) attack
methods, particularly Optical Probing (OP), pose a serious threat to the security of Integrated …
methods, particularly Optical Probing (OP), pose a serious threat to the security of Integrated …
Framework and tools for undergraduates designing RISC-V processors on an FPGA in computer architecture education
T McGrew, E Schonauer… - … on Computational Science …, 2019 - ieeexplore.ieee.org
Arguably, each computer engineer undergrad should build a simple processor in the pursuit
of their degree to help them internalize the basic design principles and properties of a …
of their degree to help them internalize the basic design principles and properties of a …
xbgas: A global address space extension on risc-v for high performance computing
The tremendous expansion of data volume has driven the transition from monolithic
architectures towards systems integrated with discrete and distributed subcomponents in …
architectures towards systems integrated with discrete and distributed subcomponents in …
The BRISC-V platform: A practical teaching approach for computer architecture
Computer architecture lies at the intersection of electrical engineering, digital design,
compiler design, programming language theory and high-performance computing. It is …
compiler design, programming language theory and high-performance computing. It is …
[PDF][PDF] PERC: Posit enhanced rocket chip
MV Arunkumar, SG Bhairathi… - Proceedings of Fourth …, 2020 - researchgate.net
Precision and performance of arithmetic processing is a known trade-off of a system design.
The IEEE 754 fixed width 32-bit and 64-bit precision arithmetic, while tuned for performance …
The IEEE 754 fixed width 32-bit and 64-bit precision arithmetic, while tuned for performance …
AsteRISC: A Size-Optimized RISC-V Core for Design Space Exploration
J Saussereau, C Leroux, JB Begueret… - … Symposium on Circuits …, 2023 - ieeexplore.ieee.org
The RISC-V open source instruction set architecture is a promising solution for applications
related to low power embedded systems. This paper presents a configurable RISC-V …
related to low power embedded systems. This paper presents a configurable RISC-V …
Adaptive caches as a defense mechanism against cache side-channel attacks
Side-channel attacks exploit architectural features of computing systems and algorithmic
properties of applications executing on these systems to steal sensitive information. Cache …
properties of applications executing on these systems to steal sensitive information. Cache …
Simplifi: hardware simulation of embedded software fault attacks
J Grycel, P Schaumont - Cryptography, 2021 - mdpi.com
Fault injection simulation on embedded software is typically captured using a high-level fault
model that expresses fault behavior in terms of programmer-observable quantities. These …
model that expresses fault behavior in terms of programmer-observable quantities. These …
Soccom: Automated synthesis of system-on-chip architectures
We present CAD framework and EDA tool,, for automated synthesis of optimized SoC
architectures. We delineate a disciplined and streamlined methodology to enable automated …
architectures. We delineate a disciplined and streamlined methodology to enable automated …
A hardware root-of-trust design for low-power soc edge devices
A Ehret, E Del Rosario, K Gettings… - 2020 IEEE High …, 2020 - ieeexplore.ieee.org
In this work, we introduce a hardware root-of-trust architecture for low-power edge devices.
An accelerator-based SoC design that includes the hardware root-of-trust architecture is …
An accelerator-based SoC design that includes the hardware root-of-trust architecture is …