Kismet: parallel speedup estimates for serial programs

D Jeon, S Garcia, C Louie, MB Taylor - Proceedings of the 2011 ACM …, 2011 - dl.acm.org
Software engineers now face the difficult task of refactoring serial programs for parallel
execution on multicore processors. Currently, they are offered little guidance as to how much …

[PDF][PDF] A review of parallelization tools and introduction to easypar

S Sah, VG Vaidya - International Journal of Computer Applications, 2012 - academia.edu
Multicore processors have paved the way to increase the performance of any application by
the virtue of benefits of parallelization. However, exploiting parallelism from a program is not …

[图书][B] A Complete Open Source Network Stack For BlackParrot

YM Chueh - 2022 - search.proquest.com
Dennard scaling has come to an end. General-purpose architecture now can hardly have
major improvements in power efficiency. Therefore, recently researchers have been actively …

[图书][B] ParrotPiton and ZynqParrot: FPGA Enablements for the BlackParrot RISC-V Processor

SV Ranga - 2021 - search.proquest.com
Hardware accelerators are an active field of research in computer architecture as one
solution to overcome hurdles such as dark silicon. A host processor interfaces with an …

[图书][B] TinyParrot: An Integration-Optimized Linux-Capable Host Multicore

S Muralitharan - 2021 - search.proquest.com
Recent developments in architecture research warrant the need for efficient host cores to
interact and manage multiple accelerators in a system-on-chip design. Existing designs …

Enabling Vector Load and Store Instructions on HammerBlade Architecture

R Ramstad - 2024 - search.proquest.com
Traditionally, computer architecture has been dominated by overly complex instruction sets
that created a” solution” to every problem by adding another instruction. If these complex …

A Research-Fertile Co-Emulation Framework for RISC-V Processor Verification

AM Nataraja - 2023 - search.proquest.com
As processor design complexities increase, so do their verification complexities. As a
consequence, processor verification has slowed down and become less reliable. The recent …

An Open Source Non-Blocking Manycore L2 Cache

K Li - 2024 - search.proquest.com
This thesis presents the RTL implementation and evaluation of a non-blocking L2 victim
cache for the open-source HammerBlade manycore architecture. The primary objective of …

Vectorizing Memory Access on HammerBlade Architecture

S Athrij - 2024 - digital.lib.washington.edu
The Reduced Instruction Set Computer (RISC)-V architecture, celebrated for its open-source
flexibility and modular design, is a cornerstone for modern computing innova-tions …

New approach to speedup dynamic program parallelization analysis

S Sah, VG Vaidya - International Journal of Software Innovation (IJSI …, 2014 - igi-global.com
Abstract Development of parallel programming tools has become a mainstream research
topic and it has produced many useful tools that reduce the burden of parallel programming …