The idea of using through-silicon-via (TSV) technology has been around for many years.
However, this technology has only recently been introduced into high volume …

The term 3D IC generally means an IC package having multiple device layers, which is
different with 3D transistor structures such as the FinFET. 3D packaging and 3D integration …

Due to the winding level of the thinned wafers and the surface roughness of silicon dies, the
quality of through-silicon vias (TSVs) varies during the fabrication and bonding process. If …

Through-silicon-vias (TSVs) are prone to defects during the manufacturing process, which
pose yield challenges for three dimensional integrated circuits (3D-ICs). The area per TSV is …

Over the past few decades, electronics have become commonplace in government,
commercial, and social domains. These devices have developed rapidly, as seen in the …

Three-dimensional integration based on die/wafer stacking and through-silicon-vias (TSVs)
promises to overcome interconnect bottlenecks for nanoscale integrated circuits (ICs) …

Through-Silicon Via (TSV)-based 3D stacked ICs (SICs) are becoming increasingly
important in the semiconductor industry, yet pre-bond testing of TSVs continues to be difficult …

Testing the quality of prebond through-silicon vias (TSV) is a vital part of the Known-Good-
Die test that is often necessary to retain a high compound yield for 3-D stacked integrated …

3D integrated circuits (3D ICs) based on through-silicon vias (TSVs) have emerged as a
promising solution for overcoming interconnect and power bottlenecks in IC design …

In this paper, we present a methodology for characterization and repair of signal
degradation in through-silicon-vias (TSVs) in 3-D integrated circuits (ICs). The proposed …