The slowdown of Moore's law and the power wall necessitates a shift toward finely tunable
precision (aka transprecision) computing to reduce energy footprint. Hence, we need circuits …

In this paper, an efficient multiple-precision floating-point fused multiply-add (FMA) unit is
proposed. The proposed FMA supports not only single-precision, double-precision, and …

High performance and, at the same time, energy efficiency are important yet often conflicting
requirements in many fields of emerging applications. Those applications range from multi …

There is an emerging need to design configurable accelerators for the high-performance
computing (HPC) and artificial intelligence (AI) applications in different precisions. Thus, the …

In this article, a new multiple-mode floating-point fused multiply–add (FMA) unit is proposed
for deep learning processors. The proposed design supports three functional modes …

There is an emerging need to design multi-precision floating-point (FP) accelerators for high-
performance-computing (HPC) applications. The commonly-used methods are based on …

Optimized deep neural network (DNN) models and energy-efficient hardware designs are of
great importance in edge-computing applications. The neural architecture search (NAS) …

In this paper, we present Faust, a pipelined FPU for vector processing-capable RISC-V core
developed within the European Processor Initiative (EPI) project. Faust is based on the open …

The fused-multiply-add (FMA) instruction is a common instruction in RISC processors since
1990. A 3-stage, 8-level pipelined, dual-precision FMA is proposed here that can perform …

Recently, frequent data movement between computing units and memory during floating-
point arithmetic has become a major problem for scientific computing. Computing-in-memory …