BACKGROUND Packaged semiconductor dies, including memory chips, microprocessor
chips, and imager chips, typically include a semiconductor die mounted to a Substrate and …

US PATENT DOCUMENTS 2,821,959 A 2, 1958 Franz 3,006,318 A 10/1961 Monroe, Jr. et
al. 3,345,134 A 10/1967 Heymer et al. 3,865,298 A 2f1975 Allen et al. 3,902,036 A 8, 1975 …

Microelectronic devices and methods for filling vias and forming conductive interconnects in
microfeature workpieces and dies are disclosed herein. In one embodiment, a method …

Conductive interconnect structures and formation methods using Supercritical fluids are
disclosed. A method in accor dance with one embodiment of the invention includes form ing …

Microelectronic devices, methods for packaging microelec tronic devices, and methods for
forming vias and conductive interconnects in microfeature workpieces and dies are dis …

(56) References Cited further include chemically reacting the lining with a reactive material
to form a chemical compound from a constituent of us PATENT DOCUMENTS the reactive …

Methods for forming interconnects in microfeature work pieces, and microfeature workpieces
having such intercon nects are disclosed herein. The microfeature workpieces may have a …

(57) ABSTRACT A through-wafer interconnect for imager, memory and other integrated
circuit applications is disclosed, thereby eliminat ing the need for wire bonding, making …

US8649820B2 - Universal integrated circuit card apparatus and related methods - Google
Patents US8649820B2 - Universal integrated circuit card apparatus and related methods …

Partitioned vias, interconnects, and substrates that include such vias and interconnects are
disclosed herein. In one embodiment, a substrate has a non-conductive layer and a …