FPGA HLS today: successes, challenges, and opportunities

J Cong, J Lau, G Liu, S Neuendorffer, P Pan… - ACM Transactions on …, 2022 - dl.acm.org
The year 2011 marked an important transition for FPGA high-level synthesis (HLS), as it
went from prototyping to deployment. A decade later, in this article, we assess the progress …

hls4ml: An open-source codesign workflow to empower scientific low-power machine learning devices

F Fahim, B Hawks, C Herwig, J Hirschauer… - arXiv preprint arXiv …, 2021 - arxiv.org
Accessible machine learning algorithms, software, and diagnostic tools for energy-efficient
devices and systems are extremely valuable across a broad range of application domains …

Cosa: Scheduling by constrained optimization for spatial accelerators

Q Huang, M Kang, G Dinh, T Norell… - 2021 ACM/IEEE 48th …, 2021 - ieeexplore.ieee.org
Recent advances in Deep Neural Networks (DNNs) have led to active development of
specialized DNN accelerators, many of which feature a large number of processing …

Agile SoC development with open ESP

P Mantovani, D Giri, G Di Guglielmo… - Proceedings of the 39th …, 2020 - dl.acm.org
ESP is an open-source research platform for heterogeneous SoC design. The platform
combines a modular tile-based architecture with a variety of application-oriented flows for …

High-level synthesis design space exploration: Past, present, and future

BC Schafer, Z Wang - … on Computer-Aided Design of Integrated …, 2019 - ieeexplore.ieee.org
This article presents a survey of the different modern high-level synthesis (HLS) design
space exploration (DSE) techniques that have been proposed so far to automatically …

GRANNITE: Graph neural network inference for transferable power estimation

Y Zhang, H Ren, B Khailany - 2020 57th ACM/IEEE Design …, 2020 - ieeexplore.ieee.org
This paper introduces GRANNITE, a GPU-accelerated novel graph neural network (GNN)
model for fast, accurate, and transferable vector-based average power estimation. During …

Magnet: A modular accelerator generator for neural networks

R Venkatesan, YS Shao, M Wang… - 2019 IEEE/ACM …, 2019 - ieeexplore.ieee.org
Deep neural networks have been adopted in a wide range of application domains, leading
to high demand for inference accelerators. However, the high cost associated with ASIC …

Gpt4aigchip: Towards next-generation ai accelerator design automation via large language models

Y Fu, Y Zhang, Z Yu, S Li, Z Ye, C Li… - 2023 IEEE/ACM …, 2023 - ieeexplore.ieee.org
The remarkable capabilities and intricate nature of Artificial Intelligence (AI) have
dramatically escalated the imperative for specialized AI accelerators. Nonetheless …

A 0.32–128 TOPS, scalable multi-chip-module-based deep neural network inference accelerator with ground-referenced signaling in 16 nm

B Zimmer, R Venkatesan, YS Shao… - IEEE Journal of Solid …, 2020 - ieeexplore.ieee.org
Custom accelerators improve the energy efficiency, area efficiency, and performance of
deep neural network (DNN) inference. This article presents a scalable DNN accelerator …

Ultra-elastic cgras for irregular loop specialization

C Torng, P Pan, Y Ou, C Tan… - 2021 IEEE International …, 2021 - ieeexplore.ieee.org
Reconfigurable accelerator fabrics, including coarse-grain reconfigurable arrays (CGRAs),
have experienced a resurgence in interest because they allow fast-paced software algorithm …