Sanity-check: Boosting the reliability of safety-critical deep neural network applications

E Ozen, A Orailoglu - 2019 IEEE 28th Asian Test Symposium …, 2019 - ieeexplore.ieee.org
The widespread usage of deep neural networks in autonomous driving necessitates a
consideration of the safety arguments against hardware-level faults. This study confirms the …

High-level algorithm and architecture transformations for DSP synthesis

KK Parhi - Journal of VLSI signal processing systems for signal …, 1995 - Springer
This survey paper reviews numerous high-level transformation techniques which can be
applied at the algorithm or the architecture level to improve the performance of digital signal …

Environmental risk assessment of diclofenac residues in surface waters and wastewater: a hidden global threat to aquatic ecosystem

H Hanif, A Waseem, S Kali, NA Qureshi… - Environmental …, 2020 - Springer
Pharmaceuticals are chemical compounds employed as medicinal drugs. They have severe
physic-chemical properties which make them destructive for non-target species …

Salvagednn: salvaging deep neural network accelerators with permanent faults through saliency-driven fault-aware mapping

M Abdullah Hanif, M Shafique - … Transactions of the …, 2020 - royalsocietypublishing.org
Deep neural networks (DNNs) have proliferated in most of the application domains that
involve data processing, predictive analysis and knowledge inference. Alongside the need …

A taxonomy of reconfiguration techniques for fault-tolerant processor arrays

M Chean, JAB Fortes - Computer, 1990 - ieeexplore.ieee.org
Focuses on the characterization and classification of reconfiguration techniques. The
techniques are differentiated according to the type of redundancy (time or hardware) …

Architecting decentralization and customizability in dnn accelerators for hardware defect adaptation

E Ozen, A Orailoglu - … on Computer-Aided Design of Integrated …, 2022 - ieeexplore.ieee.org
The efficiency of machine intelligence techniques has improved noticeably in the embedded
application domains thanks to the dedicated hardware accelerators for deep neural …

[PDF][PDF] Parameterized algorithmics: A graph-theoretic approach

H Fernau - 2005 - Citeseer
Parameterized Algorithmics: A Graph-Theoretic Approach Page 1 Parameterized Algorithmics:
A Graph-Theoretic Approach Henning Fernau Universität Tübingen, WSI für Informatik, Sand …

Low-cost error detection in deep neural network accelerators with linear algorithmic checksums

E Ozen, A Orailoglu - Journal of Electronic Testing, 2020 - Springer
The widespread adoption of deep neural networks in safety-critical systems necessitates the
examination of the safety issues raised by hardware errors. The appropriateness of the …

[图书][B] Fault-tolerant parallel computation

PC Kanellakis, AA Shvartsman - 2013 - books.google.com
Fault-Tolerant Parallel Computation presents recent advances in algorithmic ways of
introducing fault-tolerance in multiprocessors under the constraint of preserving efficiency …

[PDF][PDF] Guest Editors' Introduction: Systolic Arrays-From Concept to Implementation

JAB Fortes, BW Wah - Computer, 1987 - researchgate.net
S nology and of applications that require extensive throughput. Their realization requires
human ingenuity combined with techniques and tools for algorithm development …